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./arch/powerpc/platforms/fsl_uli1575.c: CMOS_WRITE(RTC_SET, RTC_CONTROL); CMOS_WRITE(RTC_24H, RTC_CONTROL); CMOS_WRITE(0, RTC_VALID); ./arch/mn10300/kernel/rtc.c: CMOS_WRITE(save_control | RTC_SET, RTC_CONTROL); CMOS_WRITE(save_freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT); CMOS_WRITE(real_seconds, RTC_SECONDS); CMOS_WRITE(real_minutes, RTC_MINUTES); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); ./arch/mips/mti-malta/malta-platform.c: CMOS_WRITE(CMOS_READ(RTC_CONTROL) & ~RTC_DM_BINARY, RTC_CONTROL); ./arch/mips/mti-malta/malta-time.c: CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); ./arch/mips/kernel/cevt-ds1287.c: CMOS_WRITE(RTC_REF_CLCK_32KHZ | rate, RTC_REG_A); CMOS_WRITE(val, RTC_REG_B); ./arch/mips/sgi-ip32/ip32-reset.c: CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A); CMOS_WRITE(xctrl_b, DS_B1_XCTRL4B); CMOS_WRITE(xctrl_a, DS_B1_XCTRL4A); CMOS_WRITE(xctrl_a | DS_XCTRL4A_PAB, DS_B1_XCTRL4A); CMOS_WRITE(reg_a, RTC_REG_A); CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A); CMOS_WRITE(xctrl_a & ~DS_XCTRL4A_IFS, DS_B1_XCTRL4A); CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A); CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A); ./arch/mips/mipssim/sim_time.c: CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); ./arch/mips/dec/time.c: CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL); CMOS_WRITE((save_freq_select | RTC_DIV_RESET2), RTC_FREQ_SELECT); CMOS_WRITE(real_seconds, RTC_SECONDS); CMOS_WRITE(real_minutes, RTC_MINUTES); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); ./arch/x86/kernel/apic/io_apic.c: CMOS_WRITE((save_freq_select & ~RTC_RATE_SELECT) | 0x6, CMOS_WRITE(save_control | RTC_PIE, RTC_CONTROL); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); ./arch/x86/kernel/bootflag.c: CMOS_WRITE(v, sbf_port); ./arch/x86/kernel/rtc.c: CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); CMOS_WRITE(real_seconds, RTC_SECONDS); CMOS_WRITE(real_minutes, RTC_MINUTES); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); ./arch/x86/kernel/reboot.c: safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) CMOS_WRITE(0x00, 0x8f); ./arch/arm/mach-footbridge/isa-rtc.c: CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A); CMOS_WRITE(reg_b, RTC_REG_B); ./arch/cris/kernel/time.c: CMOS_WRITE(real_seconds,RTC_SECONDS); CMOS_WRITE(real_minutes,RTC_MINUTES); ./arch/cris/arch-v10/drivers/ds1302.c: CMOS_WRITE(yrs, RTC_YEAR); CMOS_WRITE(mon, RTC_MONTH); CMOS_WRITE(day, RTC_DAY_OF_MONTH); CMOS_WRITE(hrs, RTC_HOURS); CMOS_WRITE(min, RTC_MINUTES); CMOS_WRITE(sec, RTC_SECONDS); ./arch/alpha/kernel/time.c: CMOS_WRITE(0x26, RTC_FREQ_SELECT); CMOS_WRITE(x, RTC_CONTROL); CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); CMOS_WRITE(real_seconds,RTC_SECONDS); CMOS_WRITE(real_minutes,RTC_MINUTES); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); ./drivers/acpi/proc.c: CMOS_WRITE(val, offset); CMOS_WRITE(rtc_control, RTC_CONTROL); CMOS_WRITE(rtc_control, RTC_CONTROL); ./drivers/char/nvram.c: /* Note that *all* calls to CMOS_READ and CMOS_WRITE must be done with CMOS_WRITE(c, NVRAM_FIRST_BYTE + i); ./drivers/char/rtc.c: * Note that *all* calls to CMOS_READ and CMOS_WRITE are done with CMOS_WRITE(hrs, RTC_HOURS_ALARM); CMOS_WRITE(min, RTC_MINUTES_ALARM); CMOS_WRITE(sec, RTC_SECONDS_ALARM); CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); CMOS_WRITE(real_yrs, RTC_DEC_YEAR); CMOS_WRITE(yrs, RTC_YEAR); CMOS_WRITE(mon, RTC_MONTH); CMOS_WRITE(day, RTC_DAY_OF_MONTH); CMOS_WRITE(hrs, RTC_HOURS); CMOS_WRITE(min, RTC_MINUTES); CMOS_WRITE(sec, RTC_SECONDS); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); CMOS_WRITE(val, RTC_FREQ_SELECT); CMOS_WRITE(tmp, RTC_CONTROL); CMOS_WRITE(tmp, RTC_CONTROL); CMOS_WRITE(((CMOS_READ(RTC_FREQ_SELECT) & 0xF0) | 0x06), CMOS_WRITE(val, RTC_CONTROL); CMOS_WRITE(val, RTC_CONTROL); ./drivers/char/ds1302.c: CMOS_WRITE(yrs, RTC_YEAR); CMOS_WRITE(mon, RTC_MONTH); CMOS_WRITE(day, RTC_DAY_OF_MONTH); CMOS_WRITE(hrs, RTC_HOURS); CMOS_WRITE(min, RTC_MINUTES); CMOS_WRITE(sec, RTC_SECONDS); ./drivers/rtc/rtc-cmos.c: * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ CMOS_WRITE(rtc_control, RTC_CONTROL); CMOS_WRITE(rtc_control, RTC_CONTROL); CMOS_WRITE(hrs, RTC_HOURS_ALARM); CMOS_WRITE(min, RTC_MINUTES_ALARM); CMOS_WRITE(sec, RTC_SECONDS_ALARM); CMOS_WRITE(mday, cmos->day_alrm); CMOS_WRITE(mon, cmos->mon_alrm); CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT); CMOS_WRITE(*buf++, off); CMOS_WRITE(rtc_control, RTC_CONTROL); CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); CMOS_WRITE(tmp, RTC_CONTROL); CMOS_WRITE(tmp, RTC_CONTROL); ./drivers/staging/comedi/drivers/pcl816.c: CMOS_WRITE(val, RTC_CONTROL); ./drivers/staging/comedi/drivers/pcl818.c: CMOS_WRITE(val, RTC_CONTROL); CMOS_WRITE(val, RTC_FREQ_SELECT); ./arch/powerpc/include/asm/mc146818rtc.h: #define CMOS_WRITE(val, addr) ({ \ ./arch/sparc/include/asm/mc146818rtc_32.h: #define CMOS_WRITE(val, addr) ({ \ ./arch/sparc/include/asm/mc146818rtc_64.h: #define CMOS_WRITE(val, addr) ({ \ ./arch/m32r/include/asm/mc146818rtc.h: #define CMOS_WRITE(val, addr) ({ \ ./arch/m32r/include/asm/rtc.h: # define CMOS_WRITE(val,reg) ds1302_writereg(reg,val) # define CMOS_WRITE(x,y) ./arch/mn10300/include/asm/rtc-regs.h: #define CMOS_WRITE(val, addr) \ ./arch/mips/include/asm/mach-malta/mc146818rtc.h: static inline void CMOS_WRITE(unsigned char data, unsigned long addr) ./arch/mips/include/asm/mach-generic/mc146818rtc.h: static inline void CMOS_WRITE(unsigned char data, unsigned long addr) ./arch/mips/include/asm/mc146818-time.h: CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); CMOS_WRITE(real_seconds, RTC_SECONDS); CMOS_WRITE(real_minutes, RTC_MINUTES); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); ./arch/mips/include/asm/mach-dec/mc146818rtc.h: static inline void CMOS_WRITE(unsigned char data, unsigned long addr) ./arch/mips/include/asm/mach-jazz/mc146818rtc.h: static inline void CMOS_WRITE(unsigned char data, unsigned long addr) ./arch/mips/include/asm/mach-ip32/mc146818rtc.h: static inline void CMOS_WRITE(unsigned char data, unsigned long addr) ./arch/mips/include/asm/mach-pb1x00/mc146818rtc.h: static inline void CMOS_WRITE(unsigned char data, unsigned long offset) ./arch/mips/include/asm/mach-loongson/mc146818rtc.h: static inline void CMOS_WRITE(unsigned char data, unsigned long addr) ./arch/m68k/include/asm/mc146818rtc.h: #define CMOS_WRITE(val, addr) ({ \ ./arch/x86/include/asm/smpboot_hooks.h: CMOS_WRITE(0xa, 0xf); CMOS_WRITE(0, 0xf); ./arch/x86/include/asm/mc146818rtc.h: #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr) ./arch/arm/include/asm/mc146818rtc.h: #define CMOS_WRITE(val, addr) ({ \ ./arch/cris/include/asm/rtc.h: # define CMOS_WRITE(val,reg) ds1302_writereg(reg,val) # define CMOS_WRITE(val,reg) pcf8563_writereg(reg,val) # define CMOS_WRITE(x,y) ./arch/alpha/include/asm/mc146818rtc.h: #define CMOS_WRITE(val, addr) ({ \ ./include/asm-generic/rtc.h: CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); CMOS_WRITE(real_yrs, RTC_DEC_YEAR); CMOS_WRITE(yrs, RTC_YEAR); CMOS_WRITE(mon, RTC_MONTH); CMOS_WRITE(day, RTC_DAY_OF_MONTH); CMOS_WRITE(hrs, RTC_HOURS); CMOS_WRITE(min, RTC_MINUTES); CMOS_WRITE(sec, RTC_SECONDS); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); ./drivers/rtc/Kconfig: # requires <asm/mc146818rtc.h> defining CMOS_READ/CMOS_WRITE, and a |
