[lk] Differences between PCI and PCI Express Bus Enumeration - National Instruments

[Peter Teoh]

http://digital.ni.com/public.nsf/allkb/C7234E1FB3B3BAC38625759A007321EB Differences between PCI and PCI Express Bus Enumeration Hardware: PXI/CompactPCI Problem:  What are the main differences in PCI and PCI Express when enumerating the bus? Solution:  The introduction of PCI-Express brought a slew of new features to the PC, and new sets of challenges.  PCI-Express uses the existing software layers and protocols while dramatically improving the trhroughput at the lower logical and physical layers.  An example of new features include higher bandwidth, a point to point routing scheme, Active State Power Management for new levels of power savings, and end-to-end error checking.  PCI-Express has brought to the mainstream a new level of I/O throughput. PCI Bus Enumeration PCI Express has brought new capabilities with its higher bandwidth and point-to-point connection scheme. However, this point-to-point connection method has brought with it an increased number of logic buses to the system. In PCI (and PXI), a bus would consist of several PCI devices connected over a common set of wires. A bus could have as many as 10 devices. For a PC, all PCI devices resided on a single bus. PXI expansion could add up to three more logical buses using PCI-PCI bridges for an additional 18 slots (typical of NI backplane designs). However, PCI Express (and PXIe) is point to point buses. Each and every connection is a new bus. A PC with PCI Express may have six or seven PCI buses now (PCIe is software compatible with PCI) and an expansion chassis may add many more. The BIOS of some PC’s could previously make assumptions about the number of PCI buses a system might expect based on its design. During the PCI enumeration (or discovery and programming phase), a BIOS could limit its bus scan and resource allocation based on its design assumptions. With PCI Express, the old assumptions are no longer logical since each device added to the system adds a new bus. However, since PCI Express is software compatible with PCI, all systems have not been updated with new code for complete PCI (and PCI Expresss) bus scans and resource allocations.  Some PC’s may have issues correctly identifying and allocating resources for National Instruments chassis. Since the problem centers around the number of PCI buses detected, larger expansion configurations are more susceptible to encountering this potential issue. For example, an 18 slot chassis is more likely to encounter this than a four slot chassis. It should be noted that this as a PC-dependant behavior, so users will not see this with every model of PC available. End users may experience a range of behaviors including unidentified or missing hardware in configuration tools to systems that will not boot.  PCI Express has enable NI to create new instruments and open new areas for measurement and control. Like any new standard, it has come with its share of quirks, but these are being overcome with time. NI is committed to enabling the new opportunities that PCI Express allows, while providing our customers with the best possible user experience. We are working to overcome the PC’s limitations rather than depend solely on a limited compatibility list that narrows customer choices to a few selected models. We believe this provides the best options for our customers.