On Monday 22 October 2007 15:34:24, Benjamin Herrenschmidt wrote: > > Sorry I didn't realized that. I've finished looking pem64b.pdf, but it's > > almost nothing like in ppc 4xx/44x. > > You'll have to get yourself a 44x manual :-) > > > > It's a software loaded TLB, you'll have to put translations in the TLB > > > yourself. You'll need to design your own data structures for that, tho > > > you can use a page table for tracking, like we do in linux, and then > > > have your own TLB miss handler to fill the TLB from that. > > > > OK, Shall I look for the DataTLBError code in head.S? I realized that > > I've got DataTLBError sometimes via BDI2000/kgdb (the fault address is > > within DataTLBError), Shall I should also look for arch/ppc/mm/fault.c? > > head_44x.S is where you'll find some guidance Yup, I've found how does the kernel handle tlbs, I think the most important thing is I forgot read/write the SPRN_SPRG3 register as _switch does. > > > Your initial code probably need to bolt a TLB entry for the kernel > > > itself. > > > > I don't understand this clearly, how can I do this? > > Well, you insert a TLB entry manually and avoid replacing it later on I've add the _PAGE_PRESENT flag to the related PTE > Ben.
Thanks very much I'm now getting much clearer about my question:) Regards, Wang -- Wang, Baojun Lanzhou University Distributed & Embedded System Lab http://dslab.lzu.edu.cn School of Information Science and Engeneering [EMAIL PROTECTED] Tianshui South Road 222. Lanzhou 730000 .P.R.China Tel:+86-931-8912025 Fax:+86-931-8912022
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