On Wed, 2016-08-06 at 14:25:50 UTC, "Aneesh Kumar K.V" wrote: > Radix invalidate control (RIC) is used to control which cache to flush > using tlb instructions. When doing a PID flush, we currently flush > everything including page walk cache. For address range flush, we flush > only the TLB. In the later patch, we add support for flushing only > page walk cache. > > Signed-off-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com>
Applied to powerpc fixes, thanks. https://git.kernel.org/powerpc/c/36194812a4063dd2a72070aec3 cheers _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
