Here you are: i2c-0 i2c Radeon i2c bit bus 0x90 I2C adapter i2c-1 i2c Radeon i2c bit bus 0x91 I2C adapter i2c-2 i2c Radeon i2c bit bus 0x92 I2C adapter i2c-3 i2c Radeon i2c bit bus 0x93 I2C adapter i2c-4 i2c Radeon i2c bit bus 0x94 I2C adapter i2c-5 i2c Radeon i2c bit bus 0x95 I2C adapter i2c-6 i2c Radeon i2c bit bus 0x96 I2C adapter i2c-7 i2c Radeon i2c bit bus 0x97 I2C adapter i2c-8 i2c card0-DP-1 I2C adapter i2c-9 i2c card0-DP-2 I2C adapter
- Christian On 31 July 2016 at 08:36 AM, Wolfram Sang wrote:
00:1c.2 SMBus: PA Semi, Inc PWRficient SMBus Controller (rev 01) Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 72 Region 0: I/O ports at 7f0280 [size=64] SMbus Controllers The CPU provides 3 SMbus controllers, and these are used to connect up various SMbus and I2C devices. The number of SMbusses is expanded to 7 via a 1:4 multiplexer on SMbus 1.Can you send the output of 'i2cdetect -l' (you need i2c-tools for that). I assume the multiplexed bus occupies the bus number the above bus 1c.2 wants to have. This was present all the time, my recent change only made it visible.
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