Hi Ben,

> The various calls to establish exception endianness and AIL are
> now done from a single point using already established CPU and FW
> feature bits to decide what to do.
> 
> Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>

...

+static void configure_exceptions(void)
+{
+       /* Setup the trampolines from the lowmem exception vectors
+        * to the kdump kernel when not using a relocatable kernel.
+        */
+       setup_kdump_trampoline();
+
+       /* Under a PAPR hypervisor, we need hypercalls */
+       if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
+               long rc;
+
+               /* Enable AIL */
+               rc = pSeries_enable_reloc_on_exc();
+               if (rc == H_P2) {
+                       pr_info("Relocation on exceptions not supported\n");
+               } else if (rc != H_SUCCESS) {
+                       pr_warn("Unable to enable relocation on exceptions: "
+                               "%ld\n", rc);
+               }
+
+               /*
+                * Tell the hypervisor that we want our exceptions to
+                * be taken in little endian mode. If this fails we don't
+                * want to use BUG() because it will trigger an exception.
+                *
+                * We don't call this for big endian as our calling convention
+                * makes us always enter in BE, and the call may fail under
+                * some circumstances with kdump.
+                */
+#ifdef __LITTLE_ENDIAN__
+               rc = pseries_little_endian_exceptions();
+               if (rc) {
+                       ppc_md.progress("H_SET_MODE LE exception fail", 0);
+                       panic("Could not enable little endian exceptions");
+               }
+#endif
+       } else {
+               /* Set endian mode using OPAL */
+               if (firmware_has_feature(FW_FEATURE_OPAL))
+                       opal_configure_cores();
+
+               /* Enable AIL if supported, and we are in hypervisor mode */
+               if (cpu_has_feature(CPU_FTR_HVMODE) &&
+                   cpu_has_feature(CPU_FTR_ARCH_207S)) {
+                       unsigned long lpcr = mfspr(SPRN_LPCR);
+                       mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
+               }
+       }
+}

It looks like we only set LPCR_AIL_3 on the boot CPU after this change,
is that expected? Before that we did it in cpu_ready_for_interrupts()
which is called for the primary and all secondary CPUs.

Anton

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