On Tue, 2016-11-29 at 02:13:46 UTC, Benjamin Herrenschmidt wrote: > On 64-bit CPUs with no-execute support and non-snooping icache, such as > 970 or POWER4, we have a software mechanism to ensure coherency of the > cache (using exec faults when needed). > > This was broken due to a logic inversion when that code was rewritten > from assembly to C. > > Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org> > Fixes: 91f1da99792a1d133df94c4753510305353064a1 > Fixes: 89ff725051d177556b23d80f2a30f880a657a6c1 > Fixes: a43c0eb8364c022725df586e91dd753633374d66 > Reviewed-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com>
Applied to powerpc fixes, thanks. https://git.kernel.org/powerpc/c/dd7b2f035ec41a409f7a7cec7aabc0 cheers
