Thankfully it only happens when manually manipulating CPPR which
is rather quite rare.

Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
---
 arch/powerpc/kvm/book3s_xive_template.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/kvm/book3s_xive_template.c 
b/arch/powerpc/kvm/book3s_xive_template.c
index 4636ca6e7d38..150be86b1018 100644
--- a/arch/powerpc/kvm/book3s_xive_template.c
+++ b/arch/powerpc/kvm/book3s_xive_template.c
@@ -16,7 +16,16 @@ static void GLUE(X_PFX,ack_pending)(struct kvmppc_xive_vcpu 
*xc)
        u8 cppr;
        u16 ack;
 
-       /* XXX DD1 bug workaround: Check PIPR vs. CPPR first ! */
+       /*
+        * DD1 bug workaround: If PIPR is less favored than CPPR
+        * ignore the interrupt or we might incorrectly lose an IPB
+        * bit.
+        */
+       if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
+               u8 pipr = __x_readb(__x_tima + TM_QW1_OS + TM_PIPR);
+               if (pipr >= xc->hw_cppr)
+                       return;
+       }
 
        /* Perform the acknowledge OS to register cycle. */
        ack = be16_to_cpu(__x_readw(__x_tima + TM_SPC_ACK_OS_REG));

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