[PATCH v2 09/16] ASoC: fsl_ssi: Set xFEN0 and xFEN1 together

[Nicolin Chen]

It'd be safer to enable both FIFOs for TX or RX at the same time.

Signed-off-by: Nicolin Chen <nicoleots...@gmail.com>
Tested-by: Caleb Crome <ca...@crome.org>
---
 sound/soc/fsl/fsl_ssi.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 4399a22..e75b57d 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -586,6 +586,11 @@ static void fsl_ssi_setup_regvals(struct fsl_ssi *ssi)
        if (fsl_ssi_is_ac97(ssi))
                vals[RX].scr = vals[TX].scr = 0;
 
+       if (ssi->use_dual_fifo) {
+               vals[RX].srcr |= SSI_SRCR_RFEN1;
+               vals[TX].stcr |= SSI_STCR_TFEN1;
+       }
+
        if (ssi->use_dma) {
                vals[RX].sier |= SSI_SIER_RDMAE;
                vals[TX].sier |= SSI_SIER_TDMAE;
@@ -986,14 +991,9 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev,
                     SSI_SFCSR_TFWM0(wm) | SSI_SFCSR_RFWM0(wm) |
                     SSI_SFCSR_TFWM1(wm) | SSI_SFCSR_RFWM1(wm));
 
-       if (ssi->use_dual_fifo) {
-               regmap_update_bits(regs, REG_SSI_SRCR,
-                                  SSI_SRCR_RFEN1, SSI_SRCR_RFEN1);
-               regmap_update_bits(regs, REG_SSI_STCR,
-                                  SSI_STCR_TFEN1, SSI_STCR_TFEN1);
+       if (ssi->use_dual_fifo)
                regmap_update_bits(regs, REG_SSI_SCR,
                                   SSI_SCR_TCH_EN, SSI_SCR_TCH_EN);
-       }
 
        if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_AC97)
                fsl_ssi_setup_ac97(ssi);
-- 
2.7.4