On Thu, 25 Jan 2018 16:05:12 +1100 Paul Mackerras <[email protected]> wrote:
> POWER9 processors up to and including "Nimbus" v2.2 have hardware > bugs relating to transactional memory and thread reconfiguration. > One of these bugs has a workaround which is to get the core into > SMT4 state temporarily. This workaround is only needed when > running bare-metal. How often will this be triggered, in practice? If it's infrequent, then would it be better to just do a smp_call_function on siblings and get them all spinning there? I'm looking sadly at the added sync... Thanks, Nick
