---
 arch/powerpc/kernel/entry_64.S       | 15 ++++++++++++++-
 arch/powerpc/kernel/exceptions-64s.S | 31 ++++++++++++++++++++++++++++---
 2 files changed, 42 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 107c15c6f48b..32e8d8f7e091 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -967,7 +967,20 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
        bl      __check_irq_replay
        cmpwi   cr0,r3,0
        beq     .Lrestore_no_replay
- 
+
+       /*
+        * We decide VERY late if we need to replay interrupts, theres
+        * not much which can be done about that so this will have to
+        * do
+        */
+       TM_KERNEL_ENTRY
+       /*
+        * This will restore r3 that TM_KERNEL_ENTRY clobbered.
+        * Clearly not ideal! I wonder if we could change the trap
+        * value beforehand...
+        */
+       bl      __check_irq_replay
+
        /*
         * We need to re-emit an interrupt. We do so by re-using our
         * existing exception frame. We first change the trap value,
diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 3ac87e53b3da..c8899bf77fb0 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -504,6 +504,11 @@ EXC_COMMON_BEGIN(data_access_common)
        li      r5,0x300
        std     r3,_DAR(r1)
        std     r4,_DSISR(r1)
+       /*
+        * Can't do TM_KERNEL_ENTRY here as do_hash_page might jump to
+        * very late in the expection exit code, well after any
+        * possiblity of doing a recheckpoint
+        */
 BEGIN_MMU_FTR_SECTION
        b       do_hash_page            /* Try to handle as hpte fault */
 MMU_FTR_SECTION_ELSE
@@ -548,6 +553,11 @@ EXC_COMMON_BEGIN(instruction_access_common)
        li      r5,0x400
        std     r3,_DAR(r1)
        std     r4,_DSISR(r1)
+       /*
+        * Can't do TM_KERNEL_ENTRY here as do_hash_page might jump to
+        * very late in the expection exit code, well after any
+        * possiblity of doing a recheckpoint
+        */
 BEGIN_MMU_FTR_SECTION
        b       do_hash_page            /* Try to handle as hpte fault */
 MMU_FTR_SECTION_ELSE
@@ -761,6 +771,7 @@ EXC_COMMON_BEGIN(alignment_common)
        std     r4,_DSISR(r1)
        bl      save_nvgprs
        RECONCILE_IRQ_STATE(r10, r11)
+       TM_KERNEL_ENTRY
        addi    r3,r1,STACK_FRAME_OVERHEAD
        bl      alignment_exception
        b       ret_from_except
@@ -1668,7 +1679,9 @@ do_hash_page:
 
 /* Here we have a page fault that hash_page can't handle. */
 handle_page_fault:
-11:    andis.  r0,r4,DSISR_DABRMATCH@h
+11:    TM_KERNEL_ENTRY
+       ld      r4,_DSISR(r1)
+       andis.  r0,r4,DSISR_DABRMATCH@h
        bne-    handle_dabr_fault
        ld      r4,_DAR(r1)
        ld      r5,_DSISR(r1)
@@ -1685,6 +1698,10 @@ handle_page_fault:
 
 /* We have a data breakpoint exception - handle it */
 handle_dabr_fault:
+       /*
+        * Don't need to do TM_KERNEL_ENTRY here as we'll
+        * come from handle_page_fault: which has done it already
+        */
        bl      save_nvgprs
        ld      r4,_DAR(r1)
        ld      r5,_DSISR(r1)
@@ -1698,7 +1715,14 @@ handle_dabr_fault:
  * the PTE insertion
  */
 13:    bl      save_nvgprs
-       mr      r5,r3
+       /*
+        * Use a non-volatile as the TM code will call, r3 is the
+        * return value from __hash_page() so not exactly easy to get
+        * again.
+        */
+       mr      r31,r3
+       TM_KERNEL_ENTRY
+       mr      r5, r31
        addi    r3,r1,STACK_FRAME_OVERHEAD
        ld      r4,_DAR(r1)
        bl      low_hash_fault
@@ -1713,7 +1737,8 @@ handle_dabr_fault:
  * the access, or panic if there isn't a handler.
  */
 77:    bl      save_nvgprs
-       mr      r4,r3
+       TM_KERNEL_ENTRY
+       ld      r4,_DAR(r1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r5,SIGSEGV
        bl      bad_page_fault
-- 
2.16.2

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