On Mon, 2018-05-14 at 22:50 +1000, Michael Ellerman wrote: > Add byte-swapping versions of __raw_writeq() and __raw_rm_writeq(). > > This allows us to avoid sparse warnings caused by passing __be64 to > __raw_writeq(), which takes unsigned long: > > arch/powerpc/platforms/powernv/pci-ioda.c:1981:38: > warning: incorrect type in argument 1 (different base types) > expected unsigned long [unsigned] v > got restricted __be64 [usertype] <noident> > > It's also generally preferable to use a byte-swapping accessor rather > than doing it by hand in the code, which is more bug prone. > > Signed-off-by: Michael Ellerman <[email protected]>
For this and the following patches: Reviewed-by: Samuel Mendoza-Jonas <[email protected]> > --- > arch/powerpc/include/asm/io.h | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h > index af074923d598..e0331e754568 100644 > --- a/arch/powerpc/include/asm/io.h > +++ b/arch/powerpc/include/asm/io.h > @@ -367,6 +367,11 @@ static inline void __raw_writeq(unsigned long v, > volatile void __iomem *addr) > *(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v; > } > > +static inline void __raw_writeq_be(unsigned long v, volatile void __iomem > *addr) > +{ > + __raw_writeq((__force unsigned long)cpu_to_be64(v), addr); > +} > + > /* > * Real mode versions of the above. Those instructions are only supposed > * to be used in hypervisor real mode as per the architecture spec. > @@ -395,6 +400,11 @@ static inline void __raw_rm_writeq(u64 val, volatile > void __iomem *paddr) > : : "r" (val), "r" (paddr) : "memory"); > } > > +static inline void __raw_rm_writeq_be(u64 val, volatile void __iomem *paddr) > +{ > + __raw_rm_writeq((__force u64)cpu_to_be64(val), paddr); > +} > + > static inline u8 __raw_rm_readb(volatile void __iomem *paddr) > { > u8 ret;
