> -----Original Message----- > From: Rasmus Villemoes <rasmus.villem...@prevas.se> > Sent: Monday, June 3, 2019 2:54 PM > To: devicet...@vger.kernel.org; Qiang Zhao <qiang.z...@nxp.com>; Leo Li > <leoyang...@nxp.com> > Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org; > linux-ker...@vger.kernel.org; Rob Herring <robh...@kernel.org>; Scott > Wood <o...@buserror.net>; Christophe Leroy <christophe.le...@c-s.fr>; > Mark Rutland <mark.rutl...@arm.com>; jo...@infinera.com > <joakim.tjernl...@infinera.com> > Subject: Re: [PATCH v3 0/6] soc/fsl/qe: cleanups and new DT binding > > On 13/05/2019 13.14, Rasmus Villemoes wrote: > > This small series consists of some small cleanups and simplifications > > of the QUICC engine driver, and introduces a new DT binding that makes > > it much easier to support other variants of the QUICC engine IP block > > that appears in the wild: There's no reason to expect in general that > > the number of valid SNUMs uniquely determines the set of such, so it's > > better to simply let the device tree specify the values (and, > > implicitly via the array length, also the count). > > > > Which tree should this go through? > > Ping? These patches should be ready to go in, but I don't know who is > supposed to pick them up.
I can pick them up through the soc/fsl tree. Regards, Leo
