Follow the pattern of sreset and HMI handlers more closely, in using
EXCEPTION_PROLOG_COMMON_1 rather than open-coding it. Run the handler
at the relocated location.

This will help with simplification and code sharing.

Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
 arch/powerpc/kernel/exceptions-64s.S | 86 ++++++++++++++--------------
 1 file changed, 42 insertions(+), 44 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 8ed787dc579c..384f591ef078 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -958,17 +958,34 @@ BEGIN_FTR_SECTION
        b       machine_check_pseries
 END_FTR_SECTION_IFCLR(CPU_FTR_HVMODE)
 #endif
-       b       machine_check_common_early
+       EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 0, 0x200, 1, 1, 0
+       mfctr   r10             /* save ctr */
+       BRANCH_TO_C000(r11, machine_check_early_common)
+       /*
+        * MSR_RI is not enabled, because PACA_EXMC is being used, so a
+        * nested machine check corrupts it. machine_check_common enables
+        * MSR_RI.
+        */
 EXC_REAL_END(machine_check, 0x200, 0x100)
 EXC_VIRT_NONE(0x4200, 0x100)
-TRAMP_REAL_BEGIN(machine_check_common_early)
-       EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 0, 0x200, 0, 0, 0
+
+#ifdef CONFIG_PPC_PSERIES
+TRAMP_REAL_BEGIN(machine_check_fwnmi)
+       /* See comment at machine_check exception, don't turn on RI */
+       EXCEPTION_PROLOG_0 PACA_EXMC
+machine_check_pseries:
+       EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0
+       EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0
+#endif
+
+TRAMP_KVM_SKIP(PACA_EXMC, 0x200)
+
+EXC_COMMON_BEGIN(machine_check_early_common)
+       mtctr   r10                     /* Restore ctr */
+       mfspr   r11,SPRN_SRR0
+       mfspr   r12,SPRN_SRR1
+
        /*
-        * Register contents:
-        * R13          = PACA
-        * R9           = CR
-        * Original R9 to R13 is saved on PACA_EXMC
-        *
         * Switch to mc_emergency stack and handle re-entrancy (we limit
         * the nested MCE upto level 4 to avoid stack overflow).
         * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
@@ -989,32 +1006,30 @@ TRAMP_REAL_BEGIN(machine_check_common_early)
         * the machine check is handled then the idle wakeup code is called
         * to restore state.
         */
-       mr      r11,r1                  /* Save r1 */
        lhz     r10,PACA_IN_MCE(r13)
        cmpwi   r10,0                   /* Are we in nested machine check */
-       bne     0f                      /* Yes, we are. */
-       /* First machine check entry */
-       ld      r1,PACAMCEMERGSP(r13)   /* Use MC emergency stack */
-0:     subi    r1,r1,INT_FRAME_SIZE    /* alloc stack frame */
+       cmpwi   cr1,r10,MAX_MCE_DEPTH   /* Are we at maximum nesting */
        addi    r10,r10,1               /* increment paca->in_mce */
        sth     r10,PACA_IN_MCE(r13)
+
+       mr      r10,r1                  /* Save r1 */
+       bne     1f
+       /* First machine check entry */
+       ld      r1,PACAMCEMERGSP(r13)   /* Use MC emergency stack */
+1:     subi    r1,r1,INT_FRAME_SIZE    /* alloc stack frame */
        /* Limit nested MCE to level 4 to avoid stack overflow */
-       cmpwi   r10,MAX_MCE_DEPTH
-       bgt     2f                      /* Check if we hit limit of 4 */
-       std     r11,GPR1(r1)            /* Save r1 on the stack. */
-       std     r11,0(r1)               /* make stack chain pointer */
-       mfspr   r11,SPRN_SRR0           /* Save SRR0 */
-       std     r11,_NIP(r1)
-       mfspr   r11,SPRN_SRR1           /* Save SRR1 */
-       std     r11,_MSR(r1)
-       mfspr   r11,SPRN_DAR            /* Save DAR */
-       std     r11,_DAR(r1)
-       mfspr   r11,SPRN_DSISR          /* Save DSISR */
-       std     r11,_DSISR(r1)
-       std     r9,_CCR(r1)             /* Save CR in stackframe */
+       bge     cr1,2f                  /* Check if we hit limit of 4 */
+
+       EXCEPTION_PROLOG_COMMON_1()
        /* We don't touch AMR here, we never go to virtual mode */
-       /* Save r9 through r13 from EXMC save area to stack frame. */
        EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
+       EXCEPTION_PROLOG_COMMON_3(0x200)
+
+       ld      r3,PACA_EXMC+EX_DAR(r13)
+       lwz     r4,PACA_EXMC+EX_DSISR(r13)
+       std     r3,_DAR(r1)
+       std     r4,_DSISR(r1)
+
        mfmsr   r11                     /* get MSR value */
        ori     r11,r11,MSR_ME|MSR_RI   /* turn on ME, RI */
        LOAD_HANDLER(r12, machine_check_handle_early)
@@ -1035,21 +1050,6 @@ TRAMP_REAL_BEGIN(machine_check_common_early)
        b       1b
        b       .       /* prevent speculative execution */
 
-#ifdef CONFIG_PPC_PSERIES
-TRAMP_REAL_BEGIN(machine_check_fwnmi)
-       EXCEPTION_PROLOG_0 PACA_EXMC
-machine_check_pseries:
-       EXCEPTION_PROLOG_1 EXC_STD, PACA_EXMC, 1, 0x200, 1, 1, 0
-       EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0
-       /*
-        * MSR_RI is not enabled, because PACA_EXMC is being used, so a
-        * nested machine check corrupts it. machine_check_common enables
-        * MSR_RI.
-        */
-#endif
-
-TRAMP_KVM_SKIP(PACA_EXMC, 0x200)
-
 EXC_COMMON_BEGIN(machine_check_common)
        /*
         * Machine check is different because we use a different
@@ -1116,8 +1116,6 @@ EXC_COMMON_BEGIN(machine_check_idle_common)
         * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
         */
 EXC_COMMON_BEGIN(machine_check_handle_early)
-       std     r0,GPR0(r1)     /* Save r0 */
-       EXCEPTION_PROLOG_COMMON_3(0x200)
        bl      save_nvgprs
        addi    r3,r1,STACK_FRAME_OVERHEAD
        bl      machine_check_early
-- 
2.20.1

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