On Thu, Jul 18, 2019 at 01:45:16PM +1000, Oliver O'Halloran wrote: > > Other than m68k, mips, and arm64, everybody else that doesn't have > > ARCH_NO_COHERENT_DMA_MMAP set uses this default implementation, so > > I assume this behavior is acceptable on those architectures. > > It might be acceptable, but there's no reason to use pgport_noncached > if the platform supports cache-coherent DMA. > > Christoph (+cc) made the change so maybe he saw something we're missing.
I always found the forcing of noncached access even for coherent devices a little odd, but this was inherited from the previous implementation, which surprised me a bit as the different attributes are usually problematic even on x86. Let me dig into the history a bit more, but I suspect the righ fix is to default to cached mappings for coherent devices.
