On Thu, 2008-04-03 at 13:45 +0200, Stefan Roese wrote:
> On some 4xx PPC's (e.g. 460EX/GT), the rx channel number is a multiple
> of 8 (e.g. 8 for EMAC1, 16 for EMAC2), but enabling in MAL_RXCASR needs
> the divided by 8 value for the bitmask.
Sounds ok, but I wonder if we ever have a MAL with more than 8 chans, do
we need to make this shift conditional to some device tree prop ?
> Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>
> ---
> drivers/net/ibm_newemac/mal.c | 16 ++++++++++++++++
> 1 files changed, 16 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/net/ibm_newemac/mal.c b/drivers/net/ibm_newemac/mal.c
> index 6869f08..fb9c9eb 100644
> --- a/drivers/net/ibm_newemac/mal.c
> +++ b/drivers/net/ibm_newemac/mal.c
> @@ -136,6 +136,14 @@ void mal_enable_rx_channel(struct mal_instance *mal, int
> channel)
> {
> unsigned long flags;
>
> + /*
> + * On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple
> + * of 8, but enabling in MAL_RXCASR needs the divided by 8 value
> + * for the bitmask
> + */
> + if (!(channel % 8))
> + channel >>= 3;
> +
> spin_lock_irqsave(&mal->lock, flags);
>
> MAL_DBG(mal, "enable_rx(%d)" NL, channel);
> @@ -148,6 +156,14 @@ void mal_enable_rx_channel(struct mal_instance *mal, int
> channel)
>
> void mal_disable_rx_channel(struct mal_instance *mal, int channel)
> {
> + /*
> + * On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple
> + * of 8, but enabling in MAL_RXCASR needs the divided by 8 value
> + * for the bitmask
> + */
> + if (!(channel % 8))
> + channel >>= 3;
> +
> set_mal_dcrn(mal, MAL_RXCARR, MAL_CHAN_MASK(channel));
>
> MAL_DBG(mal, "disable_rx(%d)" NL, channel);
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