On Fri, 2020-03-27 at 16:12 +0100, Christophe Leroy wrote: > > Le 27/03/2020 à 10:03, Balamuruhan S a écrit : > > On Fri, 2020-03-27 at 07:48 +0100, Christophe Leroy wrote: > > > Le 26/03/2020 à 07:15, Balamuruhan S a écrit : > > > > Data Cache Block Invalidate (dcbi) instruction was implemented back in > > > > PowerPC > > > > architecture version 2.03. It is obsolete and attempt to use of this > > > > illegal > > > > instruction results in a hypervisor emulation assistance interrupt. So, > > > > ifdef > > > > it out the option `i` in xmon for 64bit Book3S. > > > > > > I don't understand. You say two contradictory things: > > > 1/ You say it _was_ added back. > > > 2/ You say it _is_ obsolete. > > > > > > How can it be obsolete if it was added back ? > > > > I actually learnt it from P8 and P9 User Manual, > > > > The POWER8/POWER9 core does not provide support for the following optional > > or > > obsolete instructions (attempted use of these results in a hypervisor > > emulation > > assistance interrupt): > > • tlbia - TLB invalidate all > > • tlbiex - TLB invalidate entry by index (obsolete) > > • slbiex - SLB invalidate entry by index (obsolete) > > • dcba - Data cache block allocate (Book II; obsolete) > > • dcbi - Data cache block invalidate (obsolete) > > • rfi - Return from interrupt (32-bit; obsolete) > > > > Then that's exactly what you have to say in the coming log.
Sure, I will change the commit log in next version along with your suggested way to ifdef. > > Maybe you could also change invalidate_dcache_range(): > > for (i = 0; i < size >> shift; i++, addr += bytes) { > if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) > dcbf(addr); > else > dcbi(addr); > } I will leave this as is based on the discussion. Thank you Christophe and Segher. -- Bala > > > > > Christophe