Hi Jordan, Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next] [also build test ERROR on v5.7-rc3 next-20200501] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Jordan-Niethe/Initial-Prefixed-Instruction-support/20200501-124644 base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next config: powerpc-randconfig-a001-20200501 (attached as .config) compiler: powerpc-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=powerpc If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <l...@intel.com> All error/warnings (new ones prefixed by >>): arch/powerpc/mm/nohash/8xx.c: In function 'mmu_patch_addis': >> arch/powerpc/mm/nohash/8xx.c:104:31: error: incompatible type for argument 2 >> of 'patch_instruction_site' 104 | patch_instruction_site(site, instr); | ^~~~~ | | | unsigned int In file included from arch/powerpc/mm/nohash/8xx.c:13: arch/powerpc/include/asm/code-patching.h:39:69: note: expected 'struct ppc_inst' but argument is of type 'unsigned int' 39 | static inline int patch_instruction_site(s32 *site, struct ppc_inst instr) | ~~~~~~~~~~~~~~~~^~~~~ In file included from arch/powerpc/include/asm/asm-compat.h:6, from arch/powerpc/include/asm/bug.h:6, from include/linux/bug.h:5, from include/linux/mmdebug.h:5, from include/linux/mm.h:9, from include/linux/memblock.h:13, from arch/powerpc/mm/nohash/8xx.c:10: arch/powerpc/mm/nohash/8xx.c: In function 'mmu_mapin_ram': >> arch/powerpc/include/asm/ppc-opcode.h:234:24: error: incompatible type for >> argument 2 of 'patch_instruction_site' 234 | #define PPC_INST_NOP 0x60000000 | ^~~~~~~~~~ | | | int >> arch/powerpc/mm/nohash/8xx.c:128:54: note: in expansion of macro >> 'PPC_INST_NOP' 128 | patch_instruction_site(&patch__dtlbmiss_immr_jmp, PPC_INST_NOP); | ^~~~~~~~~~~~ In file included from arch/powerpc/mm/nohash/8xx.c:13: arch/powerpc/include/asm/code-patching.h:39:69: note: expected 'struct ppc_inst' but argument is of type 'int' 39 | static inline int patch_instruction_site(s32 *site, struct ppc_inst instr) | ~~~~~~~~~~~~~~~~^~~~~ -- In file included from include/linux/printk.h:7, from include/linux/kernel.h:15, from include/linux/list.h:9, from include/linux/preempt.h:11, from include/linux/spinlock.h:51, from arch/powerpc/kernel/trace/ftrace.c:16: arch/powerpc/kernel/trace/ftrace.c: In function '__ftrace_make_nop': >> include/linux/kern_levels.h:5:18: error: format '%x' expects argument of >> type 'unsigned int', but argument 2 has type 'struct ppc_inst' >> [-Werror=format=] 5 | #define KERN_SOH "\001" /* ASCII Start Of Header */ | ^~~~~~ include/linux/kern_levels.h:11:18: note: in expansion of macro 'KERN_SOH' 11 | #define KERN_ERR KERN_SOH "3" /* error conditions */ | ^~~~~~~~ include/linux/printk.h:299:9: note: in expansion of macro 'KERN_ERR' 299 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__) | ^~~~~~~~ >> arch/powerpc/kernel/trace/ftrace.c:233:3: note: in expansion of macro >> 'pr_err' 233 | pr_err("Not expected bl: opcode is %x\n", op); | ^~~~~~ arch/powerpc/kernel/trace/ftrace.c:233:39: note: format string is defined here 233 | pr_err("Not expected bl: opcode is %x\n", op); | ~^ | | | unsigned int In file included from include/linux/printk.h:7, from include/linux/kernel.h:15, from include/linux/list.h:9, from include/linux/preempt.h:11, from include/linux/spinlock.h:51, from arch/powerpc/kernel/trace/ftrace.c:16: arch/powerpc/kernel/trace/ftrace.c: In function '__ftrace_make_call': >> include/linux/kern_levels.h:5:18: error: format '%x' expects argument of >> type 'unsigned int', but argument 2 has type 'struct ppc_inst' >> [-Werror=format=] 5 | #define KERN_SOH "\001" /* ASCII Start Of Header */ | ^~~~~~ include/linux/kern_levels.h:11:18: note: in expansion of macro 'KERN_SOH' 11 | #define KERN_ERR KERN_SOH "3" /* error conditions */ | ^~~~~~~~ include/linux/printk.h:299:9: note: in expansion of macro 'KERN_ERR' 299 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__) | ^~~~~~~~ arch/powerpc/kernel/trace/ftrace.c:595:3: note: in expansion of macro 'pr_err' 595 | pr_err("Expected NOP but have %x\n", op); | ^~~~~~ arch/powerpc/kernel/trace/ftrace.c:595:34: note: format string is defined here 595 | pr_err("Expected NOP but have %x\n", op); | ~^ | | | unsigned int >> arch/powerpc/kernel/trace/ftrace.c:615:24: error: passing argument 1 of >> 'patch_instruction' from incompatible pointer type >> [-Werror=incompatible-pointer-types] 615 | if (patch_instruction((unsigned int *)ip, op)) | ^~~~~~~~~~~~~~~~~~ | | | unsigned int * In file included from arch/powerpc/kernel/trace/ftrace.c:27: arch/powerpc/include/asm/code-patching.h:31:40: note: expected 'struct ppc_inst *' but argument is of type 'unsigned int *' 31 | int patch_instruction(struct ppc_inst *addr, struct ppc_inst instr); | ~~~~~~~~~~~~~~~~~^~~~ cc1: all warnings being treated as errors vim +/patch_instruction_site +104 arch/powerpc/mm/nohash/8xx.c bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 97 d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 98 static void mmu_patch_addis(s32 *site, long simm) d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 99 { d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 100 unsigned int instr = *(unsigned int *)patch_site_addr(site); d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 101 d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 102 instr &= 0xffff0000; d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 103 instr |= ((unsigned long)simm) >> 16; d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 @104 patch_instruction_site(site, instr); d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 105 } d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 106 0601546f23fb70 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-12-14 107 static void mmu_mapin_ram_chunk(unsigned long offset, unsigned long top, pgprot_t prot) a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 108 { a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 109 unsigned long s = offset; a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 110 unsigned long v = PAGE_OFFSET + s; a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 111 phys_addr_t p = memstart_addr + s; a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 112 a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 113 for (; s < top; s += PAGE_SIZE) { a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 114 map_kernel_page(v, p, prot); a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 115 v += PAGE_SIZE; a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 116 p += PAGE_SIZE; a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 117 } a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 118 } a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 119 14e609d693ef67 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 120 unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top) bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 121 { bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 122 unsigned long mapped; a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 123 4badd43ae44109 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 124 if (__map_without_ltlbs) { bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 125 mapped = 0; 4badd43ae44109 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 126 mmu_mapin_immr(); 665bed2386e5dc arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-13 127 if (!IS_ENABLED(CONFIG_PIN_TLB_IMMR)) 1a210878bf21de arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2018-10-19 @128 patch_instruction_site(&patch__dtlbmiss_immr_jmp, PPC_INST_NOP); 665bed2386e5dc arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-13 129 if (!IS_ENABLED(CONFIG_PIN_TLB_TEXT)) 1a210878bf21de arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2018-10-19 130 mmu_patch_cmp_limit(&patch__itlbmiss_linmem_top, 0); bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 131 } else { a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 132 unsigned long einittext8 = ALIGN(__pa(_einittext), SZ_8M); a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 133 bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 134 mapped = top & ~(LARGE_PAGE_SIZE_8M - 1); e4470bd6a41477 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-13 135 if (!IS_ENABLED(CONFIG_PIN_TLB_TEXT)) a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 136 mmu_patch_cmp_limit(&patch__itlbmiss_linmem_top, einittext8); a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 137 a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 138 /* a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 139 * Populate page tables to: a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 140 * - have them appear in /sys/kernel/debug/kernel_page_tables a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 141 * - allow the BDI to find the pages when they are not PINNED a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 142 */ a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 143 mmu_mapin_ram_chunk(0, einittext8, PAGE_KERNEL_X); a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 144 mmu_mapin_ram_chunk(einittext8, mapped, PAGE_KERNEL); a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 145 mmu_mapin_immr(); a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 146 } a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 147 1a210878bf21de arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2018-10-19 148 mmu_patch_cmp_limit(&patch__dtlbmiss_linmem_top, mapped); 1a210878bf21de arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2018-10-19 149 mmu_patch_cmp_limit(&patch__fixupdar_linmem_top, mapped); a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 150 a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 151 /* If the size of RAM is not an exact power of two, we may not a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 152 * have covered RAM in its entirety with 8 MiB a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 153 * pages. Consequently, restrict the top end of RAM currently a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 154 * allocable so that calls to the MEMBLOCK to allocate PTEs for "tail" a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 155 * coverage with normal-sized pages (or other reasons) do not a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 156 * attempt to allocate outside the allowed range. a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 157 */ bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 158 if (mapped) a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 159 memblock_set_current_limit(mapped); a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 160 eef784bbe775e6 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2017-07-12 161 block_mapped_ram = mapped; eef784bbe775e6 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2017-07-12 162 a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 163 return mapped; a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 164 } 516d91893b548d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 165 :::::: The code at line 104 was first introduced by commit :::::: d5f17ee96447736a84bc44ffc4b0dddb1b519222 powerpc/8xx: don't disable large TLBs with CONFIG_STRICT_KERNEL_RWX :::::: TO: Christophe Leroy <christophe.le...@c-s.fr> :::::: CC: Michael Ellerman <m...@ellerman.id.au> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip