[PATCH v2 2/5] powerpc/pmem: Add flush routines using new pmem store and sync instruction

[Aneesh Kumar K.V]

Start using dcbstps; phwsync; sequence for flushing persistent memory range.
Even though the new instructions are implemented as a variant of dcbf and 
hwsync and on
POWER9 they will be executed as those instructions, we still avoid using them on
older hardware. This helps to avoid difficult to debug bugs.

Signed-off-by: Aneesh Kumar K.V <aneesh.ku...@linux.ibm.com>
---
 arch/powerpc/lib/pmem.c | 52 +++++++++++++++++++++++++++++++++++++----
 1 file changed, 48 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/lib/pmem.c b/arch/powerpc/lib/pmem.c
index 0666a8d29596..076d75efb57a 100644
--- a/arch/powerpc/lib/pmem.c
+++ b/arch/powerpc/lib/pmem.c
@@ -9,20 +9,64 @@
 
 #include <asm/cacheflush.h>
 
+static inline void clean_pmem_range_isa310(unsigned long start, unsigned long 
stop)
+{
+       unsigned long shift = l1_dcache_shift();
+       unsigned long bytes = l1_dcache_bytes();
+       void *addr = (void *)(start & ~(bytes - 1));
+       unsigned long size = stop - (unsigned long)addr + (bytes - 1);
+       unsigned long i;
+
+       for (i = 0; i < size >> shift; i++, addr += bytes)
+               asm volatile(PPC_DCBSTPS(%0, %1): :"i"(0), "r"(addr): "memory");
+
+
+       asm volatile(PPC_PHWSYNC ::: "memory");
+}
+
+static inline void flush_pmem_range_isa310(unsigned long start, unsigned long 
stop)
+{
+       unsigned long shift = l1_dcache_shift();
+       unsigned long bytes = l1_dcache_bytes();
+       void *addr = (void *)(start & ~(bytes - 1));
+       unsigned long size = stop - (unsigned long)addr + (bytes - 1);
+       unsigned long i;
+
+       for (i = 0; i < size >> shift; i++, addr += bytes)
+               asm volatile(PPC_DCBFPS(%0, %1): :"i"(0), "r"(addr): "memory");
+
+
+       asm volatile(PPC_PHWSYNC ::: "memory");
+}
+
+static inline void clean_pmem_range(unsigned long start, unsigned long stop)
+{
+       if (cpu_has_feature(CPU_FTR_ARCH_31))
+               return clean_pmem_range_isa310(start, stop);
+       return flush_dcache_range(start, stop);
+}
+
+static inline void flush_pmem_range(unsigned long start, unsigned long stop)
+{
+       if (cpu_has_feature(CPU_FTR_ARCH_31))
+               return flush_pmem_range_isa310(start, stop);
+       return flush_dcache_range(start, stop);
+}
+
 /*
  * CONFIG_ARCH_HAS_PMEM_API symbols
  */
 void arch_wb_cache_pmem(void *addr, size_t size)
 {
        unsigned long start = (unsigned long) addr;
-       flush_dcache_range(start, start + size);
+       clean_pmem_range(start, start + size);
 }
 EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
 
 void arch_invalidate_pmem(void *addr, size_t size)
 {
        unsigned long start = (unsigned long) addr;
-       flush_dcache_range(start, start + size);
+       flush_pmem_range(start, start + size);
 }
 EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
 
@@ -35,7 +79,7 @@ long __copy_from_user_flushcache(void *dest, const void 
__user *src,
        unsigned long copied, start = (unsigned long) dest;
 
        copied = __copy_from_user(dest, src, size);
-       flush_dcache_range(start, start + size);
+       clean_pmem_range(start, start + size);
 
        return copied;
 }
@@ -45,7 +89,7 @@ void *memcpy_flushcache(void *dest, const void *src, size_t 
size)
        unsigned long start = (unsigned long) dest;
 
        memcpy(dest, src, size);
-       flush_dcache_range(start, start + size);
+       clean_pmem_range(start, start + size);
 
        return dest;
 }
-- 
2.26.2