On Tue, 2020-05-19 at 10:31 +1000, Alistair Popple wrote: > POWER10 introduces two new architectural features - ISAv3.1 and matrix > multiply accumulate (MMA) instructions. Userspace detects the presence > of these features via two HWCAP bits introduced in this patch. These > bits have been agreed to by the compiler and binutils team. > > Signed-off-by: Alistair Popple <alist...@popple.id.au>
I've test booted this series + powerpc/next (30df74d67d) on top of powervm and OPAL on a P10 simulator. In both cases, it enables MMA and prefix instructions and advertises them via HWCAP2 MMA + ISA 3.1. Hence: Tested-by: Michael Neuling <mi...@neuling.org> > --- > arch/powerpc/include/uapi/asm/cputable.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/powerpc/include/uapi/asm/cputable.h > b/arch/powerpc/include/uapi/asm/cputable.h > index 540592034740..2692a56bf20b 100644 > --- a/arch/powerpc/include/uapi/asm/cputable.h > +++ b/arch/powerpc/include/uapi/asm/cputable.h > @@ -50,6 +50,8 @@ > #define PPC_FEATURE2_DARN 0x00200000 /* darn random number insn */ > #define PPC_FEATURE2_SCV 0x00100000 /* scv syscall */ > #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000 /* TM w/out suspended state > */ > +#define PPC_FEATURE2_ARCH_3_1 0x00040000 /* ISA 3.1 */ > +#define PPC_FEATURE2_MMA 0x00020000 /* Matrix Multiply Accumulate > */ > > /* > * IMPORTANT!