On Mon, Jul 06, 2020 at 07:19:02AM +0530, Santosh Sivaraj wrote:
>
> Hi Bharata,
>
> Bharata B Rao <bhar...@linux.ibm.com> writes:
>
> > Make GTSE an MMU feature and enable it by default for radix.
> > However for guest, conditionally enable it if hypervisor supports
> > it via OV5 vector. Let prom_init ask for radix GTSE only if the
> > support exists.
> >
> > Having GTSE as an MMU feature will make it easy to enable radix
> > without GTSE. Currently radix assumes GTSE is enabled by default.
> >
> > Signed-off-by: Bharata B Rao <bhar...@linux.ibm.com>
> > Reviewed-by: Aneesh Kumar K.V <aneesh.ku...@linux.ibm.com>
> > ---
> > arch/powerpc/include/asm/mmu.h | 4 ++++
> > arch/powerpc/kernel/dt_cpu_ftrs.c | 1 +
> > arch/powerpc/kernel/prom_init.c | 13 ++++++++-----
> > arch/powerpc/mm/init_64.c | 5 ++++-
> > 4 files changed, 17 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
> > index f4ac25d4df05..884d51995934 100644
> > --- a/arch/powerpc/include/asm/mmu.h
> > +++ b/arch/powerpc/include/asm/mmu.h
> > @@ -28,6 +28,9 @@
> > * Individual features below.
> > */
> >
> > +/* Guest Translation Shootdown Enable */
> > +#define MMU_FTR_GTSE ASM_CONST(0x00001000)
> > +
> > /*
> > * Support for 68 bit VA space. We added that from ISA 2.05
> > */
> > @@ -173,6 +176,7 @@ enum {
> > #endif
> > #ifdef CONFIG_PPC_RADIX_MMU
> > MMU_FTR_TYPE_RADIX |
> > + MMU_FTR_GTSE |
> > #ifdef CONFIG_PPC_KUAP
> > MMU_FTR_RADIX_KUAP |
> > #endif /* CONFIG_PPC_KUAP */
> > diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c
> > b/arch/powerpc/kernel/dt_cpu_ftrs.c
> > index a0edeb391e3e..ac650c233cd9 100644
> > --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
> > +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
> > @@ -336,6 +336,7 @@ static int __init feat_enable_mmu_radix(struct
> > dt_cpu_feature *f)
> > #ifdef CONFIG_PPC_RADIX_MMU
> > cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
> > cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
> > + cur_cpu_spec->mmu_features |= MMU_FTR_GTSE;
> > cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
> >
> > return 1;
> > diff --git a/arch/powerpc/kernel/prom_init.c
> > b/arch/powerpc/kernel/prom_init.c
> > index 90c604d00b7d..cbc605cfdec0 100644
> > --- a/arch/powerpc/kernel/prom_init.c
> > +++ b/arch/powerpc/kernel/prom_init.c
> > @@ -1336,12 +1336,15 @@ static void __init prom_check_platform_support(void)
> > }
> > }
> >
> > - if (supported.radix_mmu && supported.radix_gtse &&
> > - IS_ENABLED(CONFIG_PPC_RADIX_MMU)) {
> > - /* Radix preferred - but we require GTSE for now */
> > - prom_debug("Asking for radix with GTSE\n");
> > + if (supported.radix_mmu && IS_ENABLED(CONFIG_PPC_RADIX_MMU)) {
> > + /* Radix preferred - Check if GTSE is also supported */
> > + prom_debug("Asking for radix\n");
> > ibm_architecture_vec.vec5.mmu = OV5_FEAT(OV5_MMU_RADIX);
> > - ibm_architecture_vec.vec5.radix_ext = OV5_FEAT(OV5_RADIX_GTSE);
> > + if (supported.radix_gtse)
> > + ibm_architecture_vec.vec5.radix_ext =
> > + OV5_FEAT(OV5_RADIX_GTSE);
> > + else
> > + prom_debug("Radix GTSE isn't supported\n");
> > } else if (supported.hash_mmu) {
> > /* Default to hash mmu (if we can) */
> > prom_debug("Asking for hash\n");
> > diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
> > index bc73abf0bc25..152aa0200cef 100644
> > --- a/arch/powerpc/mm/init_64.c
> > +++ b/arch/powerpc/mm/init_64.c
> > @@ -407,12 +407,15 @@ static void __init early_check_vec5(void)
> > if (!(vec5[OV5_INDX(OV5_RADIX_GTSE)] &
> > OV5_FEAT(OV5_RADIX_GTSE))) {
> > pr_warn("WARNING: Hypervisor doesn't support RADIX with
> > GTSE\n");
> > - }
> > + cur_cpu_spec->mmu_features &= ~MMU_FTR_GTSE;
> > + } else
> > + cur_cpu_spec->mmu_features |= MMU_FTR_GTSE;
>
> The GTSE flag is set by default in feat_enable_mmu_radix(), should it
> be set again here?
Strictly speaking no, but makes it a bit explicit and also follows what
the related feature does below:
> > /* Do radix anyway - the hypervisor said we had to */
> > cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
Regards,
Bharata.
