On Wed, Jul 08, 2020 at 06:16:54PM +0200, Christophe Leroy wrote: > Le 08/07/2020 à 16:45, Mathieu Desnoyers a écrit : > >Reviewing use of the patterns "Un%Xn" with lwz and stw instructions > >(where n should be the operand number) within the Linux kernel led > >me to spot those 2 weird cases: > > > >arch/powerpc/include/asm/nohash/pgtable.h:__set_pte_at() > > > > __asm__ __volatile__("\ > > stw%U0%X0 %2,%0\n\ > > eieio\n\ > > stw%U0%X0 %L2,%1" > > : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4)) > > : "r" (pte) : "memory"); > > > >I would have expected the stw to be: > > > > stw%U1%X1 %L2,%1" > > > >and: > >arch/powerpc/include/asm/book3s/32/pgtable.h:__set_pte_at() > > > > __asm__ __volatile__("\ > > stw%U0%X0 %2,%0\n\ > > eieio\n\ > > stw%U0%X0 %L2,%1" > > : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4)) > > : "r" (pte) : "memory"); > > > >where I would have expected: > > > > stw%U1%X1 %L2,%1" > > > >Is it a bug or am I missing something ? > > Well spotted. I guess it's definitly a bug.
Yes :-) > Introduced 12 years ago by commit > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9bf2b5cd > > ("powerpc: Fixes for CONFIG_PTE_64BIT for SMP support"). > > It's gone unnoticed until now it seems. Apparently it always could use offset form memory accesses? Or even when not, %0 and %1 are likely to use the same base register for addressing :-) Segher