On 10/07/2020 15:23, Oliver O'Halloran wrote:
> Remove the IODA2 PHB checks. We already assume IODA2 in several places so
> there's not much point in wrapping most of the setup and teardown process
> in an if block.
> 
> Signed-off-by: Oliver O'Halloran <ooh...@gmail.com>
> ---
>  arch/powerpc/platforms/powernv/pci-sriov.c | 86 ++++++++++++----------
>  1 file changed, 49 insertions(+), 37 deletions(-)
> 
> diff --git a/arch/powerpc/platforms/powernv/pci-sriov.c 
> b/arch/powerpc/platforms/powernv/pci-sriov.c
> index 08f88187d65a..d5699cd2ab7a 100644
> --- a/arch/powerpc/platforms/powernv/pci-sriov.c
> +++ b/arch/powerpc/platforms/powernv/pci-sriov.c
> @@ -610,16 +610,18 @@ static void pnv_pci_sriov_disable(struct pci_dev *pdev)
>       num_vfs = iov->num_vfs;
>       base_pe = iov->vf_pe_arr[0].pe_number;
>  
> +     if (WARN_ON(!iov))
> +             return;
> +
>       /* Release VF PEs */
>       pnv_ioda_release_vf_PE(pdev);
>  
> -     if (phb->type == PNV_PHB_IODA2) {
> -             if (!iov->m64_single_mode)
> -                     pnv_pci_vf_resource_shift(pdev, -base_pe);
> +     /* Un-shift the IOV BAR resources */
> +     if (!iov->m64_single_mode)
> +             pnv_pci_vf_resource_shift(pdev, -base_pe);
>  
> -             /* Release M64 windows */
> -             pnv_pci_vf_release_m64(pdev, num_vfs);
> -     }
> +     /* Release M64 windows */
> +     pnv_pci_vf_release_m64(pdev, num_vfs);
>  }
>  
>  static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)
> @@ -693,41 +695,51 @@ static int pnv_pci_sriov_enable(struct pci_dev *pdev, 
> u16 num_vfs)
>       phb = pci_bus_to_pnvhb(pdev->bus);
>       iov = pnv_iov_get(pdev);
>  
> -     if (phb->type == PNV_PHB_IODA2) {
> -             if (!iov->vfs_expanded) {
> -                     dev_info(&pdev->dev, "don't support this SRIOV device"
> -                             " with non 64bit-prefetchable IOV BAR\n");
> -                     return -ENOSPC;
> -             }
> +     /*
> +      * There's a calls to IODA2 PE setup code littered throughout. We could
> +      * probably fix that, but we'd still have problems due to the
> +      * restriction inherent on IODA1 PHBs.
> +      *
> +      * NB: We class IODA3 as IODA2 since they're very similar.
> +      */
> +     if (phb->type != PNV_PHB_IODA2) {
> +             pci_err(pdev, "SR-IOV is not supported on this PHB\n");
> +             return -ENXIO;
> +     }

or we could just skip setting

ppc_md.pcibios_sriov_enable = pnv_pcibios_sriov_enable;

for uninteresting platforms in pnv_pci_init_ioda_phb().


>  
> -             /* allocate a contigious block of PEs for our VFs */
> -             base_pe = pnv_ioda_alloc_pe(phb, num_vfs);
> -             if (!base_pe) {
> -                     pci_err(pdev, "Unable to allocate PEs for %d VFs\n", 
> num_vfs);
> -                     return -EBUSY;
> -             }
> +     if (!iov->vfs_expanded) {
> +             dev_info(&pdev->dev, "don't support this SRIOV device"
> +                     " with non 64bit-prefetchable IOV BAR\n");
> +             return -ENOSPC;
> +     }
>  
> -             iov->vf_pe_arr = base_pe;
> -             iov->num_vfs = num_vfs;
> +     /* allocate a contigious block of PEs for our VFs */
> +     base_pe = pnv_ioda_alloc_pe(phb, num_vfs);
> +     if (!base_pe) {
> +             pci_err(pdev, "Unable to allocate PEs for %d VFs\n", num_vfs);
> +             return -EBUSY;
> +     }
>  
> -             /* Assign M64 window accordingly */
> -             ret = pnv_pci_vf_assign_m64(pdev, num_vfs);
> -             if (ret) {
> -                     dev_info(&pdev->dev, "Not enough M64 window 
> resources\n");
> -                     goto m64_failed;
> -             }
> +     iov->vf_pe_arr = base_pe;
> +     iov->num_vfs = num_vfs;
>  
> -             /*
> -              * When using one M64 BAR to map one IOV BAR, we need to shift
> -              * the IOV BAR according to the PE# allocated to the VFs.
> -              * Otherwise, the PE# for the VF will conflict with others.
> -              */
> -             if (!iov->m64_single_mode) {
> -                     ret = pnv_pci_vf_resource_shift(pdev,
> -                                                     base_pe->pe_number);
> -                     if (ret)
> -                             goto shift_failed;
> -             }
> +     /* Assign M64 window accordingly */
> +     ret = pnv_pci_vf_assign_m64(pdev, num_vfs);
> +     if (ret) {
> +             dev_info(&pdev->dev, "Not enough M64 window resources\n");
> +             goto m64_failed;
> +     }
> +
> +     /*
> +      * When using one M64 BAR to map one IOV BAR, we need to shift
> +      * the IOV BAR according to the PE# allocated to the VFs.
> +      * Otherwise, the PE# for the VF will conflict with others.
> +      */
> +     if (!iov->m64_single_mode) {
> +             ret = pnv_pci_vf_resource_shift(pdev,
> +                                             base_pe->pe_number);

This can be a single line now. Thanks,


> +             if (ret)
> +                     goto shift_failed;
>       }
>  
>       /* Setup VF PEs */
> 

-- 
Alexey

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