Jordan Niethe <jniet...@gmail.com> writes: > Update the CPU to ISA Version Mapping document to include Power10 and > ISA v3.1. > > Signed-off-by: Jordan Niethe <jniet...@gmail.com> > --- > v2: Transactional Memory = No > --- > Documentation/powerpc/isa-versions.rst | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/powerpc/isa-versions.rst > b/Documentation/powerpc/isa-versions.rst > index a363d8c1603c..3873bbba183a 100644 > --- a/Documentation/powerpc/isa-versions.rst > +++ b/Documentation/powerpc/isa-versions.rst > @@ -62,6 +65,7 @@ PPC970 No > ========== ==================================== > CPU Transactional Memory > ========== ==================================== > +Power10 No (* see Power ISA v3.1 Appendix A.)
There's three "Appendix A"s in ISA v3.1. There's one in Book I, and one in Book II. And then the one you're referring to is not actually in Book III, it's listed after Book III, and is apparently an appendix to all three books? Which is just utterly confusing. So I'll change it to say: "Appendix A. Notes on the Removal of Transactional Memory from the Architecture" Which is very long, but at least you can search for it. cheers
