On Wed, 26 Aug 2020 02:40:29 -0400, Athira Rajeev wrote: > IMC trace-mode uses MSR[HV PR] bits to set the cpumode > for the instruction pointer captured in each sample. > The bits are fetched from third DW of the trace record. > Reading third DW from IMC trace record should use be64_to_cpu > along with READ_ONCE inorder to fetch correct MSR[HV PR] bits. > Patch addresses this change. > > [...]
Applied to powerpc/fixes. [1/1] powerpc/perf: Fix reading of MSR[HV/PR] bits in trace-imc https://git.kernel.org/powerpc/c/82715a0f332843d3a1830d7ebc9ac7c99a00c880 cheers