* Michael Ellerman <m...@ellerman.id.au> [2020-09-13 11:46:41]: > Srikar Dronamraju <sri...@linux.vnet.ibm.com> writes: > > * Michael Ellerman <m...@ellerman.id.au> [2020-09-11 21:55:23]: > > > >> Srikar Dronamraju <sri...@linux.vnet.ibm.com> writes: > >> > Current code assumes that cpumask of cpus sharing a l2-cache mask will > >> > always be a superset of cpu_sibling_mask. > >> > > >> > Lets stop that assumption. cpu_l2_cache_mask is a superset of > >> > cpu_sibling_mask if and only if shared_caches is set. > >> > >> I'm seeing oopses with this: > >> > > The patch fixes qemu, and I don't see the crash on mambo, but I still > see: > [ 0.010536] smp: Bringing up secondary CPUs ... > [ 0.019189] smp: Brought up 2 nodes, 8 CPUs > [ 0.019210] numa: Node 0 CPUs: 0-3 > [ 0.019235] numa: Node 1 CPUs: 4-7 > [ 0.024444] the CACHE domain not a subset of the MC domain > [ 0.024505] BUG: arch topology borken > [ 0.024527] the SMT domain not a subset of the CACHE domain > [ 0.024563] BUG: arch topology borken > [ 0.024584] the CACHE domain not a subset of the MC domain > [ 0.024645] BUG: arch topology borken > [ 0.024666] the SMT domain not a subset of the CACHE domain > [ 0.024702] BUG: arch topology borken > [ 0.024723] the CACHE domain not a subset of the MC domain > > That's the p9 mambo model, using skiboot.tcl from skiboot, with CPUS=2, > THREADS=4 and MAMBO_NUMA=1. >
I was able to reproduce with qemu-system-ppc64 -nographic -vga none -M pseries -cpu POWER8 \ -kernel build~/vmlinux \ -m 2G,slots=2,maxmem=4G \ -object memory-backend-ram,size=1G,id=m0 \ -object memory-backend-ram,size=1G,id=m1 \ -numa node,nodeid=0,memdev=m0 \ -numa node,nodeid=1,memdev=m1 \ -smp 8,threads=4,sockets=2,maxcpus=8 \ If the CPU doesn't have a l2-cache element, then CPU not only has to set itself in the cpu_l2_cache but also the siblings. Otherwise it will so happen that the Siblings will have 4 Cpus set, and the Cache domain will have just one cpu set, leading to this BUG message. Patch follows this mail. > Node layout is: > > [ 0.000000] Early memory node ranges > [ 0.000000] node 0: [mem 0x0000000000000000-0x00000000ffffffff] > [ 0.000000] node 1: [mem 0x0000200000000000-0x00002000ffffffff] > [ 0.000000] Initmem setup node 0 [mem > 0x0000000000000000-0x00000000ffffffff] > [ 0.000000] On node 0 totalpages: 65536 > [ 0.000000] Initmem setup node 1 [mem > 0x0000200000000000-0x00002000ffffffff] > [ 0.000000] On node 1 totalpages: 65536 > > > There aren't any l2-cache properties in the device-tree under cpus. > > I'll try and have a closer look tonight. > > cheers -- Thanks and Regards Srikar Dronamraju