[PATCH 1/4] powerpc/64s: Fix hash ISA v3.0 TLBIEL instruction generation

[Nicholas Piggin]

A typo has the R field of the instruction assigned by lucky dip a la
register allocator.

Fixes: d4748276ae14c ("powerpc/64s: Improve local TLB flush for boot and MCE on 
POWER9")
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
 arch/powerpc/mm/book3s64/hash_native.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/mm/book3s64/hash_native.c 
b/arch/powerpc/mm/book3s64/hash_native.c
index 0203cdf48c54..97fa42d7027e 100644
--- a/arch/powerpc/mm/book3s64/hash_native.c
+++ b/arch/powerpc/mm/book3s64/hash_native.c
@@ -68,7 +68,7 @@ static __always_inline void tlbiel_hash_set_isa300(unsigned 
int set, unsigned in
        rs = ((unsigned long)pid << PPC_BITLSHIFT(31));
 
        asm volatile(PPC_TLBIEL(%0, %1, %2, %3, %4)
-                    : : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "r"(r)
+                    : : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "i"(r)
                     : "memory");
 }
 
-- 
2.23.0