On May 21, 2008, at 5:11 PM, Scott Wood wrote:
On Wed, May 21, 2008 at 03:57:55PM -0500, Kumar Gala wrote:
Some chips (like the SoCs from Freescale) report the wrong value in
NIRQ
and this causes issues if its doesn't match or exceed the value of
irq_count.
Is it really wrong, or just not accounting for the gap between
external
and internal interrupts?
I consider it wrong by my interpretation of the open-pic spec.
The spec says:
Num IRQ Sources: The number of highest IRQ source supported. For
instance, in a 32 source
implementation, this value will be 31. This allows support of a
maximum of 2048 interrupt sources.
(Interrupt Sources are in the 0x10000 to 0x1ffff range).
So for something like 8572, the top most interrupt source is at
0x1CE0. So I'd take that to mean NIRQs should be 231. (0x1CE0 / 0x20
- 1). NIRQS reports 107.
- k
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