On 1/20/21 3:44 PM, Naveen N. Rao wrote:
On 2021/01/20 03:16PM, Ananth N Mavinakayanahalli wrote:
...
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c index bf7a7d62ae8b..ed119858e5e9 100644 --- a/arch/powerpc/lib/sstep.c +++ b/arch/powerpc/lib/sstep.c @@ -1528,6 +1528,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, goto compute_done;case 19:+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) + return -1; if (((word >> 1) & 0x1f) == 2) { /* addpcis */ imm = (short) (word & 0xffc1); /* d0 + d2 fields */The cpu feature check should be within the if condition above since there are other instructions under opcode 19. This is not an issue right now as we don't emulate any of the others after this point, but it would be good to restrict the change to specific instructions. Rest of the changes below look good to me. The only other v3.0 instruction we need to gate is the 'scv' instruction. It would be good to handle that too.
I missed this in v2.. will send a v3. There is a bigger change needed to accommodate scv since we currently don't check for it in analyze_insn(). -- Ananth
