On Monday, 7 June 2021, Aneesh Kumar K.V <aneesh.ku...@linux.ibm.com> wrote:
> > This patchset enables MOVE_PMD/MOVE_PUD support on power. This requires > the platform to support updating higher-level page tables without > updating page table entries. This also needs to invalidate the Page Walk > Cache on architecture supporting the same. > > Changes from v6: > * Update ppc64 flush_tlb_range to invalidate page walk cache. I'd really rather not do this, I'm not sure if micro bench mark captures everything. Page tables coming from L2/L3 probably aren't the primary purpose or biggest benefit of intermediate level caches. The situation on POWER with nest mmu (coherent accelerators) is magnified. They have huge page walk cashes to make up for the fact they don't have data caches for walking page tables which makes the invalidation more painful in terms of subsequent misses, but also latency to invalidate (can be order of microseconds whereas a page invalidate is a couple of orders of magnitude faster). Yes it is a deficiency of the ppc invalidation architecture, we are aware and would like to improve it but for now those is what we have. Thanks, Nick > * Add patches to fix race between mremap and page out > * Add patch to fix build error with page table levels 2 > > Changes from v5: > * Drop patch mm/mremap: Move TLB flush outside page table lock > * Add fixes for race between optimized mremap and page out > > Changes from v4: > * Change function name and arguments based on review feedback. > > Changes from v3: > * Fix build error reported by kernel test robot > * Address review feedback. > > Changes from v2: > * switch from using mmu_gather to flush_pte_tlb_pwc_range() > > Changes from v1: > * Rebase to recent upstream > * Fix build issues with tlb_gather_mmu changes > > > Aneesh Kumar K.V (11): > mm/mremap: Fix race between MOVE_PMD mremap and pageout > mm/mremap: Fix race between MOVE_PUD mremap and pageout > selftest/mremap_test: Update the test to handle pagesize other than 4K > selftest/mremap_test: Avoid crash with static build > mm/mremap: Convert huge PUD move to separate helper > mm/mremap: Don't enable optimized PUD move if page table levels is 2 > mm/mremap: Use pmd/pud_poplulate to update page table entries > powerpc/mm/book3s64: Fix possible build error > mm/mremap: Allow arch runtime override > powerpc/book3s64/mm: Update flush_tlb_range to flush page walk cache > powerpc/mm: Enable HAVE_MOVE_PMD support > > .../include/asm/book3s/64/tlbflush-radix.h | 2 + > arch/powerpc/include/asm/tlb.h | 6 + > arch/powerpc/mm/book3s64/radix_hugetlbpage.c | 8 +- > arch/powerpc/mm/book3s64/radix_tlb.c | 70 +++++++---- > arch/powerpc/platforms/Kconfig.cputype | 2 + > include/linux/rmap.h | 13 +- > mm/mremap.c | 104 +++++++++++++-- > mm/page_vma_mapped.c | 43 ++++--- > tools/testing/selftests/vm/mremap_test.c | 118 ++++++++++-------- > 9 files changed, 251 insertions(+), 115 deletions(-) > > -- > 2.31.1 > >
