Re: [PATCH v3 03/11] powerpc/64s: avoid reloading (H)SRR registers if they are still valid

[Michael Ellerman]

Nicholas Piggin <npig...@gmail.com> writes:
> diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
> index 2c57ece6671c..44526c157bff 100644
> --- a/arch/powerpc/kernel/fpu.S
> +++ b/arch/powerpc/kernel/fpu.S
> @@ -103,6 +103,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
>       ori     r12,r12,MSR_FP
>       or      r12,r12,r4
>       std     r12,_MSR(r1)
> +     li      r4,0
> +     stb     r4,PACASRR_VALID(r13)
>  #endif
>       li      r4,1
>       stb     r4,THREAD_LOAD_FP(r5)

This didn't build for 64e. I changed it to:

#ifdef CONFIG_PPC_BOOK3S_64
        li      r4,0
        stb     r4,PACASRR_VALID(r13)
#endif


And similarly for vector.S.

cheers