On Fri, 19 Nov 2021 13:16:27 +1000, Nicholas Piggin wrote: > The POWER9 ERAT flush instruction is a SLBIA with IH=7, which is a > reserved value on POWER7/8. On POWER8 this invalidates the SLB entries > above index 0, similarly to SLBIA IH=0. > > If the SLB entries are invalidated, and then the guest is bypassed, the > host SLB does not get re-loaded, so the bolted entries above 0 will be > lost. This can result in kernel stack access causing a SLB fault. > > [...]
Applied to powerpc/fixes. [1/1] KVM: PPC: Book3S HV: Prevent POWER7/8 TLB flush flushing SLB https://git.kernel.org/powerpc/c/cf0b0e3712f7af90006f8317ff27278094c2c128 cheers