> #ifdef CONFIG_SMP > - mfspr r12,SPRN_SPRG3 > - lwz r11,TI_CPU(r12) /* get cpu number * 4 */ > + lwz r11,TI_CPU(r9) /* get cpu number * 4 */ > slwi r11,r11,2 > #else > li r11,0 > #endif > + > + lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */ > + stw r9,_NIP(r11) /* make it do a blr */ > +
hrm... you just clobbered r11, won't work very well :-) Ben. > /* Todo make sure all these are in the same page > * and load r11 (@ha part + CPU offset) only once > */ > diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S > index 0630403..c9d7234 100644 > --- a/arch/powerpc/kernel/idle_e500.S > +++ b/arch/powerpc/kernel/idle_e500.S > @@ -76,18 +76,19 @@ END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP) > /* > * Return from NAP/DOZE mode, restore some CPU specific registers, > * r2 containing physical address of current. > + * r9 points to thread_info > * r11 points to the exception frame (physical address). > * We have to preserve r10. > */ > _GLOBAL(power_save_ppc32_restore) > - lwz r9,_LINK(r11) /* interrupted in e500_idle */ > - stw r9,_NIP(r11) /* make it do a blr */ > - > #ifdef CONFIG_SMP > - mfspr r12,SPRN_SPRG3 > - lwz r11,TI_CPU(r12) /* get cpu number * 4 */ > + lwz r11,TI_CPU(r9) /* get cpu number * 4 */ > slwi r11,r11,2 > #else > li r11,0 > #endif > + > + lwz r9,_LINK(r11) /* interrupted in e500_idle */ > + stw r9,_NIP(r11) /* make it do a blr */ > + > b transfer_to_handler_cont _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
