Hi again,
u-boot assigns the IMMR to 0xff400000 in TQM834x.h, whereas the device
tree you picked has it at 0xe0000000 (it's defined in the soc node).
Don't forget to match up the PCI addresses too. patches welcome, of
course (we don't have tqm boards).
So I modified the dts to match the IMMRMBAR and the pci section at
0xff400000. In U-Boot I disabled the PCI_CONFIG because I don't need the
PCI bus. But the result is always the same. It looks like the kernel
stops booting at an earlier stage.
I hope it's OK to post my current tqm8349.dts here:
Any suggestions are welcome.
Thanks and bye,
/dts-v1/;
/ {
model = "tqc,tqm834x";
compatible = "tqc,tqm834x";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
/*pci1 = &pci1;*/
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,[EMAIL PROTECTED] {
device_type = "cpu";
reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <32768>;
i-cache-size = <32768>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
ranges = <0x0 0xff400000 0x00100000>;
reg = <0xff400000 0x00000200>;
bus-frequency = <0>; // from bootloader
[EMAIL PROTECTED] {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
reg = <0x200 0x100>;
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <15 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
[EMAIL PROTECTED] {
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
interrupts = <16 0x8>;
interrupt-parent = <&ipic>;
mode = "cpu";
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
reg = <0x82a8 4>;
ranges = <0 0x8100 0x1a8>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
cell-index = <0>;
[EMAIL PROTECTED] {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
reg = <0 0x80>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
};
[EMAIL PROTECTED] {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
reg = <0x80 0x80>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
};
[EMAIL PROTECTED] {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
reg = <0x100 0x80>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
};
[EMAIL PROTECTED] {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
reg = <0x180 0x28>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
};
};
[EMAIL PROTECTED] {
compatible = "fsl-usb2-mph";
reg = <0x22000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
[EMAIL PROTECTED] {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
interrupts = <38 0x8>;
dr_mode = "peripheral";
phy_type = "ulpi";
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy0: [EMAIL PROTECTED] {
interrupt-parent = <&ipic>;
interrupts = <17 0x8>;
reg = <0x0>;
device_type = "ethernet-phy";
};
phy1: [EMAIL PROTECTED] {
interrupt-parent = <&ipic>;
interrupts = <18 0x8>;
reg = <0x1>;
device_type = "ethernet-phy";
};
};
enet0: [EMAIL PROTECTED] {
cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy0>;
linux,network-index = <0>;
};
enet1: [EMAIL PROTECTED] {
cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy1>;
linux,network-index = <1>;
};
serial0: [EMAIL PROTECTED] {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>; // from bootloader
interrupts = <9 0x8>;
interrupt-parent = <&ipic>;
};
serial1: [EMAIL PROTECTED] {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>; // from bootloader
interrupts = <10 0x8>;
interrupt-parent = <&ipic>;
};
[EMAIL PROTECTED] {
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
ipic: [EMAIL PROTECTED] {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: [EMAIL PROTECTED] {
cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 - SATA */
0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
>;
interrupt-parent = <&ipic>;
interrupts = <66 0x8>;
bus-range = <0x0 0x0>;
ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xff408500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
[EMAIL PROTECTED] {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8349e-localbus",
"fsl,pq2pro-localbus";
reg = <0xff405000 0xd8>;
ranges = <0x3 0x0 0xf0000000 0x210>;
};
};
--
Dipl. Ing. Oliver Rutsch
EMail: [EMAIL PROTECTED] · Tel.:+49 5323 717514
Sympatec GmbH · Am Pulverhaus 1 · D-38678 Clausthal-Zellerfeld · Germany
Geschaeftsfuehrer: Dr.-Ing. E.h. Stephan Roethele · Handelsregister:
Amtsgericht Braunschweig, HRB 110809
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
