The system manager indices names are different for each platform, rename
the indices for i.MX95 to differentiate with other platform.

Signed-off-by: Shengjiu Wang <shengjiu.w...@nxp.com>
---
 include/linux/firmware/imx/sm.h | 12 ++++++------
 sound/soc/fsl/fsl_mqs.c         |  2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/linux/firmware/imx/sm.h b/include/linux/firmware/imx/sm.h
index a6220c500f7c..d4212bc42b2c 100644
--- a/include/linux/firmware/imx/sm.h
+++ b/include/linux/firmware/imx/sm.h
@@ -11,12 +11,12 @@
 #include <linux/scmi_imx_protocol.h>
 #include <linux/types.h>
 
-#define SCMI_IMX_CTRL_PDM_CLK_SEL      0       /* AON PDM clock sel */
-#define SCMI_IMX_CTRL_MQS1_SETTINGS    1       /* AON MQS settings */
-#define SCMI_IMX_CTRL_SAI1_MCLK                2       /* AON SAI1 MCLK */
-#define SCMI_IMX_CTRL_SAI3_MCLK                3       /* WAKE SAI3 MCLK */
-#define SCMI_IMX_CTRL_SAI4_MCLK                4       /* WAKE SAI4 MCLK */
-#define SCMI_IMX_CTRL_SAI5_MCLK                5       /* WAKE SAI5 MCLK */
+#define SCMI_IMX95_CTRL_PDM_CLK_SEL    0       /* AON PDM clock sel */
+#define SCMI_IMX95_CTRL_MQS1_SETTINGS  1       /* AON MQS settings */
+#define SCMI_IMX95_CTRL_SAI1_MCLK      2       /* AON SAI1 MCLK */
+#define SCMI_IMX95_CTRL_SAI3_MCLK      3       /* WAKE SAI3 MCLK */
+#define SCMI_IMX95_CTRL_SAI4_MCLK      4       /* WAKE SAI4 MCLK */
+#define SCMI_IMX95_CTRL_SAI5_MCLK      5       /* WAKE SAI5 MCLK */
 
 #define SCMI_IMX94_CTRL_PDM_CLK_SEL    0U      /*!< AON PDM clock sel */
 #define SCMI_IMX94_CTRL_MQS1_SETTINGS  1U      /*!< AON MQS settings */
diff --git a/sound/soc/fsl/fsl_mqs.c b/sound/soc/fsl/fsl_mqs.c
index 11f2f3792dce..901f840df904 100644
--- a/sound/soc/fsl/fsl_mqs.c
+++ b/sound/soc/fsl/fsl_mqs.c
@@ -388,7 +388,7 @@ static const struct fsl_mqs_soc_data fsl_mqs_imx93_data = {
 
 static const struct fsl_mqs_soc_data fsl_mqs_imx95_aon_data = {
        .type = TYPE_REG_SM,
-       .sm_index = SCMI_IMX_CTRL_MQS1_SETTINGS,
+       .sm_index = SCMI_IMX95_CTRL_MQS1_SETTINGS,
        .ctrl_off = 0x88,
        .en_mask  = BIT(1),
        .en_shift = 1,
-- 
2.34.1


Reply via email to