On Thu, 25 Sep 2008 12:39:04 +1000 David Gibson <[EMAIL PROTECTED]> wrote:
> The PCI bridge on the Holly board is current incorrectly represented > in the device tree. The current device tree node for the PCI bridge > sits under the tsi-bridge node. That's not obviously wrong, but the > PCI bridge translated some PCI spaces into CPU address ranges which > were not translated by the tsi-bridge node. > > We used to get away with this problem because the PCI bridge discovery > code was also buggy, assuming incorrectly that PCI host bridge nodes > were always directly under the root bus and treating the translated > addresses as raw CPU addresses, rather than parent bus addresses. > This has since been fixed, breaking Holly. > > This could be fixed by adding extra translations to the tsi-bridge > node, but this patch instead moves the Holly PCI bridge out of the > tsi-bridge node to the root bus. This makes the tsi-bridge node > represent only the built-in IO devices in the bridge, with a > more-or-less contiguous address range. This is the same convention > used on Freescale SoC chips, where the "soc" node represents only the > IMMR region, and the PCI and other bus bridges are separate nodes > under the root bus. > > Signed-off-by: David Gibson <[EMAIL PROTECTED]> Acked-by: Josh Boyer <[EMAIL PROTECTED]> Paul, I can include this in my 'next' branch if you aren't opposed. I'll have another set of patches going in there today/tomorrow. josh _______________________________________________ Linuxppc-dev mailing list [email protected] https://ozlabs.org/mailman/listinfo/linuxppc-dev
