Hi Again,
Le 22/01/2026 à 11:27, Christophe Leroy (CS GROUP) a écrit :
Hi Thomas,
Le 22/01/2026 à 10:50, Thomas Weißschuh a écrit :
Hi Alexander,
Could you also share your configuration?
I've just been able to reproduce it with ppc64_defconfig +
CONFIG_CC_OPTIMIZE_FOR_SIZE
VDSO32L arch/powerpc/kernel/vdso/vdso32.so.dbg
arch/powerpc/kernel/vdso/vdso32.so.dbg: dynamic relocations are not
supported
make[2]: *** [arch/powerpc/kernel/vdso/Makefile:79: arch/powerpc/kernel/
vdso/vdso32.so.dbg] Error 1
make[1]: *** [arch/powerpc/Makefile:388: vdso_prepare] Error 2
make: *** [Makefile:248: __sub-make] Error 2
Comes from here, a call to memset():
000007c0 <__c_kernel_clock_getres>:
7c0: 94 21 ff d0 stwu r1,-48(r1)
7c4: 7c 08 02 a6 mflr r0
7c8: bf a1 00 24 stmw r29,36(r1)
7cc: 7c 7e 1b 78 mr r30,r3
7d0: 7c bd 2b 78 mr r29,r5
7d4: 7c 9f 23 78 mr r31,r4
7d8: 38 a0 00 10 li r5,16
7dc: 90 01 00 34 stw r0,52(r1)
7e0: 38 80 00 00 li r4,0
7e4: 38 61 00 08 addi r3,r1,8
7e8: 48 00 00 01 bl 7e8 <__c_kernel_clock_getres+0x28>
7e8: R_PPC_REL24 memset
7ec: 7f c4 f3 78 mr r4,r30
7f0: 7f a3 eb 78 mr r3,r29
7f4: 38 a1 00 08 addi r5,r1,8
7f8: 4b ff f8 09 bl 0 <__cvdso_clock_getres_common>
7fc: 2c 03 00 00 cmpwi r3,0
800: 40 82 00 24 bne 824 <__c_kernel_clock_getres+0x64>
804: 38 00 00 f7 li r0,247
808: 7f c3 f3 78 mr r3,r30
80c: 7f e4 fb 78 mr r4,r31
810: 44 00 00 02 sc
814: 40 e3 00 08 bns+ 81c <__c_kernel_clock_getres+0x5c>
818: 7c 63 00 d0 neg r3,r3
81c: 39 61 00 30 addi r11,r1,48
820: 48 00 00 00 b 820 <__c_kernel_clock_getres+0x60>
820: R_PPC_REL24 _restgpr_29_x
824: 2c 1f 00 00 cmpwi r31,0
828: 41 82 00 14 beq 83c <__c_kernel_clock_getres+0x7c>
82c: 81 21 00 0c lwz r9,12(r1)
830: 91 3f 00 00 stw r9,0(r31)
834: 81 21 00 14 lwz r9,20(r1)
838: 91 3f 00 04 stw r9,4(r31)
83c: 38 60 00 00 li r3,0
840: 4b ff ff dc b 81c <__c_kernel_clock_getres+0x5c>
