b38fd42ff46a4a31dced8533e8a6e549693500b6 added false dependencys
to order the load of upper and lower halfs of the pte, but only
adjusted whitespace instead of deleting the old load in the iside
handler, letting the hardware see the non-dependent load.
This patch removes the extra load.
Signed-off-by: Milton Miller <[EMAIL PROTECTED]>
---
Kumar, I think this is right from my inspection, please review.
Index: next.git/arch/powerpc/kernel/head_fsl_booke.S
===================================================================
--- next.git.orig/arch/powerpc/kernel/head_fsl_booke.S 2008-10-05
02:40:38.000000000 -0500
+++ next.git/arch/powerpc/kernel/head_fsl_booke.S 2008-10-05
02:40:58.000000000 -0500
@@ -658,10 +658,6 @@ interrupt_base:
bne 2f /* Bail if permission mismach */
-#ifdef CONFIG_PTE_64BIT
- lwz r13,0(r12)
-#endif
-
/* Jump to common TLB load point */
b finish_tlb_load
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