On Thu, Feb 12, 2026 at 03:22:28PM +0800, Shengjiu Wang wrote: > The transmitter and receiver implement separate timestamp counters and > bit counters. The bit counter increments at the end of each bit in a > frame whenever the transmitter or receiver is enabled. The bit counter > can be reset by software. The timestamp counter increments on the bus > interface clock whenever it is enabled. The current value of the > timestamp counter is latched whenever the bit counter increments. > Reading the bit counter register will cause the latched timestamp > value to be saved in the bit counter timestamp register. The timestamp > counter can be reset by software, this also resets the latched timestamp > value and the bit counter timestamp register.
It seems this makes mixer-test deeply unhappy, spamming lots of: [ 56.466460] fsl-sai 30c10000.sai: ASoC error (-16): at soc_component_read_no_lock() on 30c10000.sai for register: [0x000000fc] [ 56.466469] fsl-sai 30c10000.sai: ASoC error (-16): at snd_soc_component_update_bits() on 30c10000.sai for register: [0x000000fc] into dmesg on the Toradax Verdin: https://lava.sirena.org.uk/scheduler/job/2518775#L2238 I don't have results for i.MX8MP-EVK since I didn't test it with the fixes from: https://patch.msgid.link/[email protected] applied so the test ran out of time due to the time taken to log those issues but I'm guessing this new issue should be reproducible there too.
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