Hi Shrikanth,
On 5/28/2026 7:27 PM, Shrikanth Hegde wrote:
From 10e9413cef063446d67dc02c2b44e1ea582e5d53 Mon Sep 17 00:00:00 2001
From: Shrikanth Hegde <[email protected]>
Date: Thu, 28 May 2026 06:16:44 -0400
Subject: [PATCH] topology: Provide arch_llc_mask for cache aware scheduling
Venkat Reported a boot kernel panic next-20260522. Git bisect pointed to
b5ea300a17e3 ("sched/cache: Make LLC id continuous")
Stacktrace points to llc_mask being null.
NIP [c000000000e58504] _find_first_bit+0x44/0x130
LR [c000000000e58500] _find_first_bit+0x40/0x130
Call Trace:
build_sched_domains+0xad8/0xe50
sched_init_smp+0xa8/0x164
kernel_init_freeable+0x250/0x370
ret_from_kernel_user_thread+0x14/0x1c
On powerpc, cpu_coregroup_mask is available only when the underlying
hardware support coregroup. In shared LPAR, QEMU guest or power9 etc
coregroup isn;t supported. In such cases llc_mask was being referrenced
when it was null leading to panic.
on powerpc, LLC is at SMT core level. So assumption that coregroup(MC)
domain point to LLC is wrong. Provide a way for archs to say where its
LLC is if it not at MC domain.
Fixes: b5ea300a17e3 ("sched/cache: Make LLC id continuous")
Reported-by: Venkat Rao Bagalkote <[email protected]>
Closes: https://lore.kernel.org/
all/[email protected]/
Suggested-by: Chen, Yu C <[email protected]>
Signed-off-by: Shrikanth Hegde <[email protected]>
It looks good to me. Let's see if this resolves the issue for Venkat
and Ritesh. Feel free to send the formal version :)
Reviewed-by: Chen Yu <[email protected]>
thanks,
Chenyu
