On Fri, Jun 12, 2026 at 04:44:30PM +0100, Conor Dooley wrote: > On Thu, Jun 11, 2026 at 10:39:39PM +0300, Vladimir Oltean wrote: > > From: Ioana Ciornei <[email protected]> > > > > Add support for the RCW override procedure which enables runtime > > reconfiguration of the protocol running on a SerDes lane. The procedure > > is done through the DCFG DCSR space which now can be defined as the > > second memory region of the guts DT node. > > Support is added on the following SoCs: LS1046A, LS1088A, LS2088A. > > > > The procedure is exported to the "client" driver - the Lynx10G SerDes > > PHY driver - through the following functions: > > - fsl_guts_lane_init() used to notify the initial / boot time lane mode > > running on a SerDes lane. > > - fsl_guts_lane_validate() used to validate that changing the protocol > > on a specific lane is supported. > > - fsl_guts_lane_set_mode() which can be used to request the RCW > > procedure be executed for a specific lane. > > > > Since the RCW override procedure is different depending on the SoC, the > > private fsl_soc_data structure is updated with two new per SoC callbacks > > (.serdes_get_rcw_override() and .serdes_init_rcwcr()) which get used > > from the generic fsl_guts_lane_set_mode() function. These two callbacks > > hide all the SoC specific register offsets, masks and values so that the > > _set_mode() procedure is straightforward. > > > > Signed-off-by: Ioana Ciornei <[email protected]> > > Signed-off-by: Vladimir Oltean <[email protected]> > > --- > > Cc: Conor Dooley <[email protected]> > > Cc: Krzysztof Kozlowski <[email protected]> > > Cc: Rob Herring <[email protected]> > > Cc: [email protected] > > Wrong CC list for this specific patch?
No, it was intentional. Provided for context, so DT reviewers can check that extra properties not defined in the schema aren't being used.
