From: Claudiu Manoil <[email protected]> The ENETC pseudo-MACs are proprietary internal links that do not implement any standard MII interface, so restrict their supported PHY interface modes to PHY_INTERFACE_MODE_INTERNAL only.
Since pseudo-MACs can operate at any speed between 10Mbps and 25Gbps in multiples of 10Mbps, set their MAC capabilities to cover the full range of standard full-duplex speeds: 10/100/1000/2500/5000/10000/ 20000/25000 Mbps. For standalone ENETC, expand the supported interface modes to include 10GBASER and XGMII in addition to the existing RGMII, SGMII, 1000BASEX, 2500BASEX and USXGMII modes, with MAC capabilities up to 10G. MAC_1000 is replaced with MAC_1000FD to explicitly exclude 1000M half-duplex, which is not supported. Signed-off-by: Claudiu Manoil <[email protected]> Signed-off-by: Wei Fang <[email protected]> --- drivers/net/ethernet/freescale/enetc/enetc.h | 2 +- .../freescale/enetc/enetc_pf_common.c | 39 +++++++++++++------ 2 files changed, 28 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/freescale/enetc/enetc.h b/drivers/net/ethernet/freescale/enetc/enetc.h index 06a9f1ee0970..8839cfb49bcf 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc.h +++ b/drivers/net/ethernet/freescale/enetc/enetc.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ -/* Copyright 2017-2019 NXP */ +/* Copyright 2017-2019, 2025-2026 NXP */ #include <linux/timer.h> #include <linux/pci.h> diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c b/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c index 3597cb81a7cc..adf79a99a8c8 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c +++ b/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c @@ -1,5 +1,5 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* Copyright 2024 NXP */ +/* Copyright 2024-2026 NXP */ #include <linux/fsl/enetc_mdio.h> #include <linux/of_mdio.h> @@ -400,25 +400,40 @@ int enetc_phylink_create(struct enetc_ndev_priv *priv, struct device_node *node, { struct enetc_pf *pf = enetc_si_priv(priv->si); struct phylink *phylink; + unsigned long mac_caps; int err; pf->phylink_config.dev = &priv->ndev->dev; pf->phylink_config.type = PHYLINK_NETDEV; - pf->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | - MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD; __set_bit(PHY_INTERFACE_MODE_INTERNAL, pf->phylink_config.supported_interfaces); - __set_bit(PHY_INTERFACE_MODE_SGMII, - pf->phylink_config.supported_interfaces); - __set_bit(PHY_INTERFACE_MODE_1000BASEX, - pf->phylink_config.supported_interfaces); - __set_bit(PHY_INTERFACE_MODE_2500BASEX, - pf->phylink_config.supported_interfaces); - __set_bit(PHY_INTERFACE_MODE_USXGMII, - pf->phylink_config.supported_interfaces); - phy_interface_set_rgmii(pf->phylink_config.supported_interfaces); + mac_caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE; + if (!enetc_is_pseudo_mac(priv->si)) { + mac_caps |= MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD | + MAC_5000FD | MAC_10000FD; + + __set_bit(PHY_INTERFACE_MODE_SGMII, + pf->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_1000BASEX, + pf->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_2500BASEX, + pf->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_USXGMII, + pf->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_10GBASER, + pf->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_XGMII, + pf->phylink_config.supported_interfaces); + phy_interface_set_rgmii(pf->phylink_config.supported_interfaces); + } else { + mac_caps |= MAC_10FD | MAC_100FD | MAC_1000FD | MAC_2500FD | + MAC_5000FD | MAC_10000FD | MAC_20000FD | + MAC_25000FD; + } + + pf->phylink_config.mac_capabilities = mac_caps; phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node), pf->if_mode, ops); if (IS_ERR(phylink)) { -- 2.34.1
