Provide documentation for the newly introduced debug knob named as llc_override.
This may help one if they want to experiment with cache aware scheduling. Signed-off-by: Shrikanth Hegde <[email protected]> --- Documentation/arch/powerpc/index.rst | 1 + Documentation/arch/powerpc/topology.rst | 27 +++++++++++++++++++++++++ 2 files changed, 28 insertions(+) create mode 100644 Documentation/arch/powerpc/topology.rst diff --git a/Documentation/arch/powerpc/index.rst b/Documentation/arch/powerpc/index.rst index 40419bea8e10..0f4caf50a9e7 100644 --- a/Documentation/arch/powerpc/index.rst +++ b/Documentation/arch/powerpc/index.rst @@ -33,6 +33,7 @@ powerpc qe_firmware syscall64-abi transactional_memory + topology ultravisor vas-api vcpudispatch_stats diff --git a/Documentation/arch/powerpc/topology.rst b/Documentation/arch/powerpc/topology.rst new file mode 100644 index 000000000000..9ed3cf7ade69 --- /dev/null +++ b/Documentation/arch/powerpc/topology.rst @@ -0,0 +1,27 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. _topology: + + +llc_override +============== + +Override the scheduler-visible LLC domain on PowerPC. + +Having LLC(last level cache) at MC/PKG helps to experiment with new +scheduler feature called cache aware scheduling which expects LLC to have +at least more than 1 core. Scheduler uses notion of LLC for wakeup and +load balancing decisions. + +Accepted values are: + + 0 Disable the override and use the platform default. + smt LLC will be at SMT domain. + mc LLC will be at MC domain, including at SMT domains. + pkg LLC will be at PKG domain, including at MC and SMT domains, + +Writing a new value rebuilds the scheduler domains. One can check the +domain flags and look for SD_SHARE_LLC to confirm if it took effect. + +Note that this doesn't change HW cache topology. It is only a debug knob +to experiment with scheduler related functionalities. So set it to sensible +values. Also note that there is no performance guarantees across the values. -- 2.52.0
