Running 2.6.23.25 kernel... I have an external watchdog timer that is going off - and pulsing into the MCP0 of the 8572E. I get the printk indicating that the MCP0 went off - the problem is - how do I clear the condition that caused this because my hardware engineer swears that the pulse is ONLY 250ms - and after resetting several status registers (mcpsumr & rst (because my hardware engineer swears that the pulse is ONLY 250ms long (and I have a delay after my printk of 250ms)) - so I am pretty sure
I am resetting the conditions mcpsumr (also, extra: the rstsr), but after writing mcpsumr - and reading back - it still has the mcp0 bit set? Where else do I need to reset the status - I think I am doing it right... but it isn't clearing the exception - and it 'dies' the next time through this (why is another problem - but first, I'd like to know why the condition is NOT being cleared...at all)... A couple of possibilities is that because the external MCP0 condition is actually a pulse - another machine check could be clocked in on the 'falling' edge - but this pulse is long gone before I even come close to attempting clearing the mcp0 exception in mcpsumr? FWIW, I also have the same signal pulsing to my UDE - and at least after resetting the UDE condition, it 'looks' reset - before immediately getting another UDE interrupt (potentially for the falling edge)... I am very confused here... Thanks for any advice... Tom _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
