On Thu, Jan 01, 2009 at 08:29:39AM -0600, Kumar Gala wrote: [...] >>>>>> + compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; >>>>>> + reg = <0xe0009000 0x00001000 0xb0000000 0x01000000>; >>>>> >>>>> the size on the 0xb0000000 seems wrong >>>> >>>> This is how FSL U-Boots configure the cfg window, and I'm trying to >>>> retain the compatibility. Anyway, now Linux maps only the first 4kB >>>> of that area, so we don't actually care about this, but dts is still >>>> correct for older u-boots. Newer U-Boots might want to correct this >>>> value if they want to use other cfg window setup... >>> >>> I'd rather not pollute the .dts with this >> >> So you prefer to change the cfg window size to 0x1000? > > I'd prefer to drop it (assuming that is reasonable).
I see. Yes, we can drop it and just read the outwin0 BAR register to find out the cfg space base address. > Does the PCI-express OF draft spec cover describing cfg space > > http://playground.sun.com/1275/proposals/New/516-it.txt If I understood correctly, the spec describes directly mapped cfg space, this won't work for 83xx PCI-E. I'll post new patches soon. Thanks, -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
