Benjamin Herrenschmidt wrote:
The problem is that the controller is hardwired to use only one
chipselect, even if both are enabled in the DDR0_10 on PPC440EPx/GRx
processors
Mikhail, can you verify that Valentine's patch works for you ?
Ben, unfortunately on my board(s) I don't have both bits enabled in
DDR0_10 i.e. I'll have cs=1 calculated even by original Linux code.
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
