Hi there, I've been examining the fsl dma driver (drivers/dma/fsldma.c) to work out how a typical dma engine driver works so I can port an Intel dma engine driver to the new dmaengine interface.
I have noticed that append_ld_queue() changes the next link descriptor address field in the last link descriptor of the chain. The append_ld_queue function is called from the fsl_dma_tx_submit() which can called at any time by a kernel module using that channel. This could result in the link descriptor being changed whilst the DMA engine is running. Could this issue cause unexpected behavior of the DMA engine or the driver? A second question I have is to do with the dma_halt() routine setting the channel abort flag. The dma_halt() routine is called from fsl_chan_xfer_ld_queue() after the dma engine has been detected as idle. The dma_halt() routine sets the channel stop flag and the channel abort flag. Whilst the dma engine could be idle, it may not have completed a transfer AFAICT. Or if the engine is has no more transactions then a channel abort does not need to be issued anyway? I have access to a GE Fanuc SBC310 which has an 8641D containing a dma engine this driver was written for. So I can test any patches. Thanks for your time. Malcolm -- Malcolm Crossley, Software Engineer, GE Fanuc Intelligent Platforms GE Fanuc Intelligent Platforms Ltd, registered in England and Wales (3828642) at 100 Barbirolli Square, Manchester, M2 3AB, VAT GB729849476 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev