I hate open ends, so for those interested.
I made a small change in u-boot and kernel and it works now. btw. it makes a huge performance difference. The kernel boots much slower and my user-space calculation now runs in 44 secs (no data-cache) instead of 2.8 secs (with data-cache). in u-boot the data-cache is initially used for data and stack. Once RAM is available and the u-boot relocation has been done the data cache can be disabled by clearing DCE in HID0. This must be done after flushing the cache. diff -C 5 -r1.3 start.S *** start.S 2 Apr 2009 10:36:46 -0000 1.3 --- start.S 8 May 2009 13:44:38 -0000 *************** *** 928,937 **** --- 928,949 ---- 5: dcbst 0,r4 add r4,r4,r6 cmplw r4,r5 blt 5b sync /* Wait for all dcbst to complete on bus */ + + /* disable data-cache (TEST) */ + mfspr r20, HID0 + li r21, HID0_DCE|HID0_DLOCK + andc r20, r20, r21 + ori r21, r20, HID0_DCFI + sync + mtspr HID0, r21 /* sets invalidate, clears enable and lock */ + sync + mtspr HID0, r20 /* clears invalidate */ + + mr r4,r3 6: icbi 0,r4 add r4,r4,r6 cmplw r4,r5 blt 6b The linux kernel enables the cache through __setup_cpu_603 -> setup_common_caches this function gets called from call_setup_cpu which has nothing to do with CONFIG_(HAVE_)OPROFILE. It's easy to modify this function not to set the HID0_DCE (without caring much about the assembly). diff -C 5 -r1.1.1.1 cpu_setup_6xx.S *** arch/powerpc/kernel/cpu_setup_6xx.S 5 Jan 2009 10:55:25 -0000 1.1.1.1 --- arch/powerpc/kernel/cpu_setup_6xx.S 8 May 2009 13:53:31 -0000 *************** *** 79,90 **** blr /* Enable caches for 603's, 604, 750 & 7400 */ setup_common_caches: mfspr r11,SPRN_HID0 ! andi. r0,r11,HID0_DCE ! ori r11,r11,HID0_ICE|HID0_DCE ori r8,r11,HID0_ICFI bne 1f /* don't invalidate the D-cache */ ori r8,r8,HID0_DCI /* unless it wasn't enabled */ 1: sync mtspr SPRN_HID0,r8 /* enable and invalidate caches */ --- 79,90 ---- blr /* Enable caches for 603's, 604, 750 & 7400 */ setup_common_caches: mfspr r11,SPRN_HID0 ! andi. r0,r11,(0<<14) ! ori r11,r11,HID0_ICE|(0<<14) ori r8,r11,HID0_ICFI bne 1f /* don't invalidate the D-cache */ ori r8,r8,HID0_DCI /* unless it wasn't enabled */ 1: sync mtspr SPRN_HID0,r8 /* enable and invalidate caches */ _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev