Felix Radensky wrote:
Currently concatenation support is implemented in physmap_of driver.
The syntax used to define a concatenation device involves multiple
reg tuples, as described in
Documentation/powerpc/dts-bindings/mtd-physmap.txt. Will same syntax
be acceptable for NAND chips ?
I'm not too fond of that -- it would require support in each controller
driver, and would preclude providing other device-specific information
in the node (e.g. what if each NAND chip has to sit under a different
parent node to describe its connection to the system?). What if a NAND
controller has multiple reg resources for each chip? It's not
memory-like the way NOR flash is.
If we're going to put it in the device tree at all (I suppose for the
same reason we put partitioning there), it should probably be some
external construct that glues together flash nodes.
-Scott
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