mmio[0] = address;
mmio[1] = data;
mb();
eieio is enough here.
mmio[3] |= 0x01; /* This triggers an operation -> address=data */
/* probably also need an mb() here, if the following code
* depends on the operation to be triggered. */
No, a sync does not guarantee the device has seen the store yet;
you need something specific to the device to guarantee this.
Usually a load (from the same register!) followed by code that
makes sure the load has finished is sufficient (and necessary).
hmm, the mmio[0] and mmio[1] are written in order I hope?
We do not care in this example, as the write to [3] does trigger
the device operation. We do only care that [0] and [1] are set
when [3] is written. We do not care in what order [0] and [1] are
written.
In this example yes, I was wondering in general.
The writes will not be reordered, but they can be combined,
unless you put an eieio (or sync) inbetween.
So what does guarded memory mapping on ppc mean really? If I need
that much mb(), guarded does not seem to do much.
Loosely speaking, guarded means no prefetch is done.
Segher
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